TA1360AFG_05 Datasheet, PDF (61/110 Pages) Toshiba Semiconductor – YCbCr/YPbPr Signal and Sync Processor for Digital TV, Progressive Scan TV and Double Scan TV

Note No.
Characteristics
P20 DC fluctuation at switching
sharpness control peak
frequency
TA1360AFG
SW71
B
Test Conditions
SW Mode
SW70 SW68 SW64
B
A
B
SW74
Test Method (Test condition: V_CC = 9 V/2 V, Ta = 25 ± 3°C)
ON 1. Set unicolor [05] to MAX [7F], SRT gain [19] to MIN [00], and CDE [15] to CEN [80]. Input setup signal
(0.2 Vp-p) to TPA as shown in the figure below.
2. Set sharpness [09] to MIN [00] and MAX [80]. Monitor #43, measure DC level VRDCMIN and VRDCMAX [V].
Calculate VRDC [V] using the following equation.
VRDC = VRDCMIN − VRDCMAX [V]
#68
0.2 V
#12
VRDC*
61
2005-08-18