TA1360AFG_05 Datasheet, PDF (96/110 Pages) Toshiba Semiconductor – YCbCr/YPbPr Signal and Sync Processor for Digital TV, Progressive Scan TV and Double Scan TV

TA1360AFG
Test Condition for Synchronization Block
Common Test Conditions for Synchronization Block: unless otherwise specified,
V_CC = 9 V, Ta = 25°C, bus data; preset value, SW68 = A, SW53 = A, SW INPUT = B,
SW44 = ON, SW41 = OPEN, SW40 = B, SW39a = B, SW39b = OPEN, SW37 = B
Note Characteristics
Test Conditions
HA01 Sync input horizontal 1. Input signal A (as shown in the figure below) to TPA. Set subaddress (00) data to 82H.
sync phase
2. Monitor # 53 (Sync input) and #44 (AFC filter) waveforms. Measure phase difference (S_PH).
Signal A
#44 waveform
29.36 µs
0.285 V
0.593 µs
S_PH
HA02 HD input horizontal
sync phase
1. Set subaddress (00) data to 40H.
2. Input signal B (as shown in the figure below) to TP50.
3. Monitor #50 (Sync input) and #44 (AFC filter) waveforms. Measure phase difference (HD_PH).
Signal B
#44 waveform
31.75 µs
2.35 µs
HD_PH
1.5 V
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2005-08-18