LM3S5P36 Datasheet, PDF (837/1050 Pages) Texas Instruments – Stellaris® LM3S5P36 Microcontroller

Stellaris^® LM3S5P36 Microcontroller
Bit/Field
7
6
5
4
3
Name
AUTOSET
ISO
MODE
DMAEN
FDT
Type
R/W
R/W
R/W
R/W
R/W
Reset
0
Description
Auto Set
Value Description
0 The TXRDY bit must be set manually.
1 Enables the TXRDY bit to be automatically set when data of the
maximum packet size (value in USBTXMAXPn) is loaded into
the transmit FIFO. If a packet of less than the maximum packet
size is loaded, then the TXRDY bit must be set manually.
0
Isochronous Transfers
Value Description
0 Enables the transmit endpoint for bulk or interrupt transfers.
1 Enables the transmit endpoint for isochronous transfers.
0
Mode
Value Description
0 Enables the endpoint direction as RX.
1 Enables the endpoint direction as TX.
Note: This bit only has an effect where the same endpoint FIFO is
used for both transmit and receive transactions.
0
DMA Request Enable
Value Description
0 Disables the µDMA request for the transmit endpoint.
1 Enables the µDMA request for the transmit endpoint.
Note:
3 TX and 3 RX endpoints can be connected to the µDMA
module. If this bit is set for a particular endpoint, the DMAATX,
DMABTX, or DMACTX field in the USB DMA Select
(USBDMASEL) register must be programmed
correspondingly.
0
Force Data Toggle
Value Description
0 No effect.
1 Forces the endpoint DT bit to switch and the data packet to be
cleared from the FIFO, regardless of whether an ACK was
received. This bit can be used by interrupt transmit endpoints
that are used to communicate rate feedback for isochronous
endpoints.
January 21, 2012
837
Texas Instruments-Production Data