LM3S5P36 Datasheet, PDF (15/1050 Pages) Texas Instruments – Stellaris® LM3S5P36 Microcontroller

Stellaris^® LM3S5P36 Microcontroller
Table 8-6.
Table 8-7.
Table 8-8.
Table 8-9.
Table 8-10.
Table 8-11.
Table 8-12.
Table 8-13.
Table 9-1.
Table 9-2.
Table 9-3.
Table 9-4.
Table 9-5.
Table 9-6.
Table 9-7.
Table 9-8.
Table 9-9.
Table 9-10.
Table 9-11.
Table 10-1.
Table 10-2.
Table 10-3.
Table 10-4.
Table 10-5.
Table 10-6.
Table 10-7.
Table 10-8.
Table 10-9.
Table 10-10.
Table 11-1.
Table 12-1.
Table 12-2.
Table 12-3.
Table 12-4.
Table 13-1.
Table 13-2.
Table 14-1.
Table 14-2.
Table 15-1.
Table 15-2.
Table 15-3.
Table 15-4.
Table 16-1.
Table 16-2.
Table 16-3.
Table 16-4.
Table 16-5.
μDMA Interrupt Assignments .............................................................................. 361
Channel Control Structure Offsets for Channel 30 ................................................ 362
Channel Control Word Configuration for Memory Transfer Example ...................... 362
Channel Control Structure Offsets for Channel 7 .................................................. 363
Channel Control Word Configuration for Peripheral Transmit Example .................. 364
Primary and Alternate Channel Control Structure Offsets for Channel 8 ................. 365
Channel Control Word Configuration for Peripheral Ping-Pong Receive
Example ............................................................................................................ 366
μDMA Register Map .......................................................................................... 367
GPIO Pins With Non-Zero Reset Values .............................................................. 405
GPIO Pins and Alternate Functions (64LQFP) ..................................................... 405
GPIO Pad Configuration Examples ..................................................................... 411
GPIO Interrupt Configuration Example ................................................................ 412
GPIO Pins With Non-Zero Reset Values .............................................................. 413
GPIO Register Map ........................................................................................... 413
GPIO Pins With Non-Zero Reset Values .............................................................. 424
GPIO Pins With Non-Zero Reset Values .............................................................. 430
GPIO Pins With Non-Zero Reset Values .............................................................. 432
GPIO Pins With Non-Zero Reset Values .............................................................. 435
GPIO Pins With Non-Zero Reset Values .............................................................. 441
Available CCP Pins ............................................................................................ 456
General-Purpose Timers Signals (64LQFP) ......................................................... 457
General-Purpose Timer Capabilities .................................................................... 458
Counter Values When the Timer is Enabled in Periodic or One-Shot Modes .......... 459
16-Bit Timer With Prescaler Configurations ......................................................... 459
Counter Values When the Timer is Enabled in RTC Mode .................................... 460
Counter Values When the Timer is Enabled in Input Edge-Count Mode ................. 461
Counter Values When the Timer is Enabled in Input Event-Count Mode ................ 462
Counter Values When the Timer is Enabled in PWM Mode ................................... 464
Timers Register Map .......................................................................................... 468
Watchdog Timers Register Map .......................................................................... 503
ADC Signals (64LQFP) ...................................................................................... 527
Samples and FIFO Depth of Sequencers ............................................................ 528
Differential Sampling Pairs ................................................................................. 535
ADC Register Map ............................................................................................. 544
UART Signals (64LQFP) .................................................................................... 605
UART Register Map ........................................................................................... 614
SSI Signals (64LQFP) ........................................................................................ 662
SSI Register Map .............................................................................................. 673
I2C Signals (64LQFP) ........................................................................................ 703
Examples of I²C Master Timer Period versus Speed Mode ................................... 707
Inter-Integrated Circuit (I²C) Interface Register Map ............................................. 716
Write Field Decoding for I2CMCS[3:0] Field ......................................................... 722
Controller Area Network Signals (64LQFP) .......................................................... 741
Message Object Configurations .......................................................................... 746
CAN Protocol Ranges ........................................................................................ 754
CANBIT Register Values .................................................................................... 754
CAN Register Map ............................................................................................. 758
January 21, 2012
15
Texas Instruments-Production Data