LM3S5P36 Datasheet, PDF (825/1050 Pages) Texas Instruments – Stellaris® LM3S5P36 Microcontroller

Stellaris^® LM3S5P36 Microcontroller
Register 33: USB Full-Speed Last Transaction to End of Frame Timing
(USBFSEOF), offset 0x07D
This 8-bit configuration register specifies the minimum time gap allowed between the start of the
last transaction and the EOF for full-speed transactions.
USB Full-Speed Last Transaction to End of Frame Timing (USBFSEOF)
Base 0x4005.0000
Offset 0x07D
Type R/W, reset 0x77
7
6
5
4
3
2
1
0
FSEOFG
Type R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
1
1
1
0
1
1
1
Bit/Field
7:0
Name
FSEOFG
Type
R/W
Reset
0x77
Description
Full-Speed End-of-Frame Gap
This field is used during full-speed transactions to configure the gap
between the last transaction and the End-of-Frame (EOF), in units of
533.3 ns. The default corresponds to 63.46 µs.
January 21, 2012
825
Texas Instruments-Production Data