LM3S5P36 Datasheet, PDF (13/1050 Pages) Texas Instruments – Stellaris® LM3S5P36 Microcontroller

Stellaris^® LM3S5P36 Microcontroller
Figure 18-2. Structure of Comparator Unit .............................................................................. 860
Figure 18-3. Comparator Internal Reference Structure ............................................................ 860
Figure 19-1. PWM Module Diagram ....................................................................................... 872
Figure 19-2. PWM Generator Block Diagram .......................................................................... 872
Figure 19-3. PWM Count-Down Mode .................................................................................... 874
Figure 19-4. PWM Count-Up/Down Mode .............................................................................. 875
Figure 19-5. PWM Generation Example In Count-Up/Down Mode ........................................... 875
Figure 19-6. PWM Dead-Band Generator ............................................................................... 876
Figure 20-1. QEI Block Diagram ............................................................................................ 942
Figure 20-2. Quadrature Encoder and Velocity Predivider Operation ........................................ 944
Figure 21-1. 64-Pin LQFP Package Pin Diagram .................................................................... 963
Figure 24-1. Load Conditions ................................................................................................ 987
Figure 24-2. JTAG Test Clock Input Timing ............................................................................. 988
Figure 24-3. JTAG Test Access Port (TAP) Timing .................................................................. 988
Figure 24-4. Power-On Reset Timing ..................................................................................... 989
Figure 24-5. Brown-Out Reset Timing .................................................................................... 989
Figure 24-6. Power-On Reset and Voltage Parameters ........................................................... 990
Figure 24-7. External Reset Timing (RST) .............................................................................. 990
Figure 24-8. Software Reset Timing ....................................................................................... 990
Figure 24-9. Watchdog Reset Timing ..................................................................................... 991
Figure 24-10. MOSC Failure Reset Timing ............................................................................... 991
Figure 24-11. Hibernation Module Timing with Internal Oscillator Running in Hibernation ............ 996
Figure 24-12. Hibernation Module Timing with Internal Oscillator Stopped in Hibernation ............ 996
Figure 24-13. ADC Input Equivalency Diagram ......................................................................... 998
Figure 24-14. SSI Timing for TI Frame Format (FRF=01), Single Transfer Timing
Measurement .................................................................................................... 999
Figure 24-15. SSI Timing for MICROWIRE Frame Format (FRF=10), Single Transfer ................. 999
Figure 24-16. SSI Timing for SPI Frame Format (FRF=00), with SPH=1 ................................... 1000
Figure 24-17. I²C Timing ....................................................................................................... 1001
Figure C-1. Stellaris LM3S5P36 64-Pin LQFP Package ....................................................... 1045
Figure C-2. 64-Pin LQFP Tray Dimensions .......................................................................... 1047
Figure C-3. 64-Pin LQFP Tape and Reel Dimensions ........................................................... 1048
January 21, 2012
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Texas Instruments-Production Data