LM3S5P36 Datasheet, PDF (672/1050 Pages) Texas Instruments – Stellaris® LM3S5P36 Microcontroller

Synchronous Serial Interface (SSI)
14.4
See “Micro Direct Memory Access (μDMA)” on page 346 for more details about programming the
μDMA controller.
Initialization and Configuration
To enable and initialize the SSI, the following steps are necessary:
1. Enable the SSI module by setting the SSI bit in the RCGC1 register (see page 262).
2. Enable the clock to the appropriate GPIO module via the RCGC2 register (see page 271). To
find out which GPIO port to enable, refer to Table 22-5 on page 980.
3. Set the GPIO AFSEL bits for the appropriate pins (see page 424). To determine which GPIOs to
configure, see Table 22-4 on page 976.
4. Configure the PMCn fields in the GPIOPCTL register to assign the SSI signals to the appropriate
pins. See page 441 and Table 22-5 on page 980.
For each of the frame formats, the SSI is configured using the following steps:
1. Ensure that the SSE bit in the SSICR1 register is clear before making any configuration changes.
2. Select whether the SSI is a master or slave:
a. For master operations, set the SSICR1 register to 0x0000.0000.
b. For slave mode (output enabled), set the SSICR1 register to 0x0000.0004.
c. For slave mode (output disabled), set the SSICR1 register to 0x0000.000C.
3. Configure the clock prescale divisor by writing the SSICPSR register.
4. Write the SSICR0 register with the following configuration:
■ Serial clock rate (SCR)
■ Desired clock phase/polarity, if using Freescale SPI mode (SPH and SPO)
■ The protocol mode: Freescale SPI, TI SSF, MICROWIRE (FRF)
■ The data size (DSS)
5. Optionally, configure the μDMA channel (see “Micro Direct Memory Access (μDMA)” on page 346)
and enable the DMA option(s) in the SSIDMACTL register.
6. Enable the SSI by setting the SSE bit in the SSICR1 register.
As an example, assume the SSI must be configured to operate with the following parameters:
■ Master operation
■ Freescale SPI mode (SPO=1, SPH=1)
■ 1 Mbps bit rate
■ 8 data bits
672
January 21, 2012
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