CDC960 Datasheet, PDF (9/38 Pages) Texas Instruments – 200-MHz CLOCK SYNTHESIZER/DRIVER WITH SPREAD SPECTURM CAPABILITY AND DEVICE CONTROL INTERFACE

CDC960
200ĆMHz CLOCK SYNTHESIZER/DRIVER
WITH SPREAD SPECTRUM CAPABILITY AND DEVICE CONTROL INTERFACE
SCAS675 – APRIL 2002
SMBus serial interface (continued)
reading the SMBus interface, using address pre-phase
1. Send the address D2_(H) and validate the acknowledge from the slave.
2. Send dummy byte as command code and validate the acknowledge from the slave.
3. Send repeated start condition followed by address D3_(H) and validate the acknowledge from the slave.
4. The slave returns the number of bytes it is going to send (byte count) and validates the acknowledge from
the master.
5. Read back the desired data bytes and validate the acknowledge sent by the master for each data byte.
Clock
Generator
Addr
(7 bits)
A(6:0)&
R/W
ACK
+8 bits
dummy
command
code
ACK
Repeated
Start
Clock
Generator
Addr
(7 bits)
A(6:0)&
R/W
ACK
+8 bit byte
count
ACK by
master
Data
byte 0
ACK by
master
Data
byte N
ACK by
master
D2(H)
D3(H)
reading the SMBus interface, using direct read
1. Send the address D3_(H) and validate the acknowledge from the slave.
2. The slave returns the number of bytes it is going to send (byte count) and validates the acknowledge from
the master.
3. Read back the desired data bytes and validate the acknowledge sent by the master for each data byte.
Clock
Generator
Addr (7 bits)
A(6:0)& R/W
D3(H)
ACK
+8 bit byte
count
ACK by master
Data byte 0
ACK by master
Data byte N
ACK by master
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