C8051F330_07 Datasheet, PDF (9/216 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F330/1/2/3/4/5
Figure 17.10. SPI Slave Timing (CKPHA = 0)........................................................ 176
Figure 17.11. SPI Slave Timing (CKPHA = 1)........................................................ 176
18. Timers
Figure 18.1. T0 Mode 0 Block Diagram.................................................................. 180
Figure 18.2. T0 Mode 2 Block Diagram.................................................................. 181
Figure 18.3. T0 Mode 3 Block Diagram.................................................................. 182
Figure 18.4. Timer 2 16-Bit Mode Block Diagram .................................................. 187
Figure 18.5. Timer 2 8-Bit Mode Block Diagram .................................................... 188
Figure 18.6. Timer 3 16-Bit Mode Block Diagram .................................................. 191
Figure 18.7. Timer 3 8-Bit Mode Block Diagram .................................................... 192
19. Programmable Counter Array
Figure 19.1. PCA Block Diagram............................................................................ 195
Figure 19.2. PCA Counter/Timer Block Diagram.................................................... 196
Figure 19.3. PCA Interrupt Block Diagram ............................................................. 197
Figure 19.4. PCA Capture Mode Diagram.............................................................. 198
Figure 19.5. PCA Software Timer Mode Diagram .................................................. 199
Figure 19.6. PCA High-Speed Output Mode Diagram............................................ 200
Figure 19.7. PCA Frequency Output Mode ............................................................ 201
Figure 19.8. PCA 8-Bit PWM Mode Diagram ......................................................... 202
Figure 19.9. PCA 16-Bit PWM Mode...................................................................... 203
Figure 19.10. PCA Module 2 with Watchdog Timer Enabled ................................. 204
20. C2 Interface
Figure 20.1. Typical C2 Pin Sharing....................................................................... 213
Rev. 1.5
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