C8051F330_07 Datasheet, PDF (162/216 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F330/1/2/3/4/5
Table 16.1. Timer Settings for Standard Baud Rates Using The Internal 24.5 MHz
Oscillator
Target
Baud Rate
(bps)
Baud Rate
% Error
Frequency: 24.5 MHz
Oscilla- Timer Clock SCA1–SCA0
tor Divide Source
(pre-scale
Factor
select)¹
T1M^{1 Timer 1}
Reload
Value (hex)
230400
–0.32%
106
SYSCLK
XX²
1
0xCB
115200
–0.32%
212
SYSCLK
XX
1
0x96
57600
0.15%
426
SYSCLK
XX
1
0x2B
28800
–0.32%
848
SYSCLK/4
01
0
0x96
14400
0.15%
1704 SYSCLK/12
00
9600
–0.32%
2544 SYSCLK/12
00
0
0xB9
0
0x96
2400
–0.32%
10176 SYSCLK/48
10
1200
0.15%
20448 SYSCLK/48
10
0
0x96
0
0x2B
Notes:
1. SCA1–SCA0 and T1M bit definitions can be found in Section 18.1.
2. X = Don’t care.
Table 16.2. Timer Settings for Standard Baud Rates Using an External 25.0 MHz
Oscillator
Frequency: 25.0 MHz
Target Baud Rate Oscilla- Timer Clock SCA1–SCA0 _T1M¹ Timer 1
Baud Rate % Error tor Divide Source
(pre-scale
Reload
(bps)
Factor
select)¹
Value (hex)
230400
–0.47%
108
SYSCLK
XX²
1
0xCA
115200
0.45%
218
SYSCLK
XX
1
0x93
57600
–0.01%
434
SYSCLK
XX
1
0x27
28800
0.45%
872 SYSCLK / 4
01
0
0x93
14400
–0.01%
1736 SYSCLK / 4
01
0
0x27
9600
0.15%
2608 EXTCLK / 8
11
0
0x5D
2400
0.45%
10464 SYSCLK / 48
10
0
0x93
1200
–0.01%
20832 SYSCLK / 48
10
0
0x27
57600
–0.47%
432 EXTCLK / 8
11
0
0xE5
28800
–0.47%
864 EXTCLK / 8
11
0
0xCA
14400
0.45%
1744 EXTCLK / 8
11
0
0x93
9600
0.15%
2608 EXTCLK / 8
11
0
0x5D
Notes:
1. SCA1–SCA0 and T1M bit definitions can be found in Section 18.1.
2. X = Don’t care.
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Rev. 1.5