C8051F330_07 Datasheet, PDF (111/216 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F330/1/2/3/4/5
SFR Definition 11.2. FLKEY: Flash Lock and Key
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR Address: 0xB7
Bits7–0:
FLKEY: Flash Lock and Key Register
Write:
This register provides a lock and key function for Flash erasures and writes. Flash writes
and erases are enabled by writing 0xA5 followed by 0xF1 to the FLKEY register. Flash
writes and erases are automatically disabled after the next write or erase is complete. If any
writes to FLKEY are performed incorrectly, or if a Flash write or erase operation is attempted
while these operations are disabled, the Flash will be permanently locked from writes or era-
sures until the next device reset. If an application never writes to Flash, it can intentionally
lock the Flash by writing a non-0xA5 value to FLKEY from software.
Read:
When read, bits 1–0 indicate the current Flash lock state.
00: Flash is write/erase locked.
01: The first key code has been written (0xA5).
10: Flash is unlocked (writes/erases allowed).
11: Flash writes/erases disabled until the next reset.
SFR Definition 11.3. FLSCL: Flash Scale
R/W
FOSE
Bit7
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
Reserved Reserved Reserved Reserved Reserved Reserved Reserved 10000000
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR Address: 0xB6
Bit7:
Bits6–0:
FOSE: Flash One-shot Enable
This bit enables the Flash read one-shot. When the Flash one-shot disabled, the Flash
sense amps are enabled for a full clock cycle during Flash reads. At system clock frequen-
cies below 10 MHz, disabling the Flash one-shot will increase system power consumption.
0: Flash one-shot disabled.
1: Flash one-shot enabled.
RESERVED. Read = 0. Must Write 0.
Rev. 1.5
111