C8051F330_07 Datasheet, PDF (156/216 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F330/1/2/3/4/5
16.1. Enhanced Baud Rate Generation
The UART0 baud rate is generated by Timer 1 in 8-bit auto-reload mode. The TX clock is generated by
TL1; the RX clock is generated by a copy of TL1 (shown as RX Timer in Figure 16.2), which is not user-
accessible. Both TX and RX Timer overflows are divided by two to generate the TX and RX baud rates.
The RX Timer runs when Timer 1 is enabled, and uses the same reload value (TH1). However, an
RX Timer reload is forced when a START condition is detected on the RX pin. This allows a receive to
begin any time a START is detected, independent of the TX Timer state.
Timer 1
TL1
Overflow
UART
2
TX Clock
Start
Detected
TH1
RX Timer
Overflow
2
RX Clock
Figure 16.2. UART0 Baud Rate Logic
Timer 1 should be configured for Mode 2, 8-bit auto-reload (see Section “18.1.3. Mode 2: 8-bit
Counter/Timer with Auto-Reload” on page 181). The Timer 1 reload value should be set so that over-
flows will occur at two times the desired UART baud rate frequency. Note that Timer 1 may be clocked by
one of six sources: SYSCLK, SYSCLK / 4, SYSCLK / 12, SYSCLK / 48, the external oscillator clock / 8, or
an external input T1. For any given Timer 1 clock source, the UART0 baud rate is determined by
Equation 16.1-A and Equation 16.1-B.
A) UartBaudRate = ^1-- × T1_Overflow_Rate
2
B) T1_Overflow_Rate = ------T---1---^C---^L---^K-------
256 – TH1
Equation 16.1. UART0 Baud Rate
Where T1_CLK is the frequency of the clock supplied to Timer 1, and T1H is the high byte of Timer 1 (reload
value). Timer 1 clock frequency is selected as described in Section “18. Timers” on page 179. A quick
reference for typical baud rates and system clock frequencies is given in Table 16.1 through Table 16.6.
Note that the internal oscillator may still generate the system clock when the external oscillator is driving
Timer 1.
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Rev. 1.5