SI5344H-42H Datasheet, PDF (7/56 Pages) Silicon Laboratories – HIGH-FREQUENCY,

Si5344H/42H
Table 3. Input Specifications (Continued)
(V_DD = 1.8 V ±5%, V_DDA = 3.3 V ±5%, T_A = –40 to 85 °C)
Parameter
REFCLK Frequency
Input Single-ended Volt-
age Swing
Input Differential Voltage
Swing
Slew rate^{2, 3}
Input Duty Cycle
Symbol
f_{IN_REF}
V_{IN_SE}
V_{IN_DIFF}
SR
DC
Test Condition
Min Typ Max
Unit
Frequency range for best 48
—
54
output jitter performance
MHz
365 — 2000 mVpp_se
365
2500 mVpp_diff
400 —
—
40
—
60
V/µs
%
Notes:
1. Voltage swing is specified as single-ended mVpp.
OUTx
OUTx
Vcm
Vcm
Vpp_se
Vpp_se
Vpp_diff = 2*Vpp_se
2. Imposed for jitter performance.
3. Rise and fall times can be estimated using the following simplified equation: tr/tf_80-20 = ((0.8 – 0.2) x V_{IN_Vpp_se}) / SR
4. This mode is intended primarily for single-ended LVCMOS input clocks < 1 MHz that must be dc-coupled because they
have a duty cycle significantly less than 50%. A typical application example is a low-frequency video frame sync pulse.
Since the input thresholds (V_IL, V_IH) of this buffer are non-standard (0.4 V and 0.8 V, respectively) refer to the input
attenuator circuit for dc-coupled pulsed LVCMOS in the Family Reference Manual. Otherwise, for standard LVCMOS
input clocks, use the Standard Differential or Single-Ended ac-coupled input mode.
5. Refer to the Family Reference Manual if you're using a single-ended AC coupled inputs with voltage swing exceeding
3.4 V.
Table 4. Control Input Pin Specifications
(V_DD = 1.8 V ±5%, V_DDA = 3.3 V ±5%, V_DDS = 3.3 V ±5%, 1.8 V ±5%, T_A = –40 to 85 °C)
Parameter
Symbol Test Condition
Min
Typ
Max
Unit
Control Input Pins (I2C_SEL, IN_SEL, RST, OE, A1, SCLK, A0/CS, SDA/SDIO)
Input Voltage
V_IL
—
— 0.3 x V_DDIO*
V
V_IH
0.7 x V_DDIO* —
—
V
Input Capacitance
C_IN
—
2
—
pF
Input Resistance
R_IN
—
20
—
k
Minimum Pulse Width
PW
RST
100
—
—
ns
*Note: V_DDIO is determined by the IO_VDD_SEL bit. It is selectable as V_DDA or V_DD. See the Family Reference Manual or
contact Silicon Labs for more details on the proper register settings.
Rev. 1.0
7