SI5344H-42H Datasheet, PDF (11/56 Pages) Silicon Laboratories – HIGH-FREQUENCY,

Si5344H/42H
Table 6. LVCMOS Clock Output Specifications
(V_DD = 1.8 V ±5%, V_DDA = 3.3 V ±5%, V_DDO = 1.8 V ±5%, 2.5 V ±5%, or 3.3 V ±5%, T_A = –40 to 85 °C)
Parameter
Symbol
Test Condition
Min Typ Max Unit
Output Frequency
Duty Cycle
Output-to-Output
Skew
f_OUT
DC
T_SK
0.0001 —
f_OUT <100 MHz
48 —
100 MHz < f_OUT < 250 MHz
45 —
Measured across outputs on same MultiSynth — 30
running at 156.25 MHz
250 MHz
52
%
55
140 ps
Output Voltage
High^{1, 2, 3}
V_OH
V_DDO = 3.3 V
OUTx_CMOS_DRV = 1
I_OH = –10 mA V_DDO —
—
V
OUTx_CMOS_DRV = 2
I_OH = –12 mA ^{x 0.85} —
—
OUTx_CMOS_DRV = 3
I_OH = –17 mA
——
V_DDO = 2.5 V
OUTx_CMOS_DRV = 1
I_OH = –6 mA V_DDO —
—
V
OUTx_CMOS_DRV = 2
I_OH = –8 mA ^{x 0.85} —
—
OUTx_CMOS_DRV = 3
I_OH = –11 mA
——
V_DDO = 1.8 V
OUTx_CMOS_DRV = 2
OUTx_CMOS_DRV = 3
I_OH = –4 mA V_DDO —
—
I_OH = –5 mA ^{x 0.85} —
—
V
Notes:
1. Driver strength is a register programmable setting and stored in NVM. Options are OUTx_CMOS_DRV = 1, 2, 3.
Refer to the Family Reference Manual or contact Silicon Labs for more details on register settings.
2. I_OL/I_OH is measured at V_OL/V_OH as shown in the dc test configuration.
3. A series termination resistor (Rs) is recommended to help match the source impedance to a 50  PCB trace. A 5 pF
capacitive load is assumed. The LVCMOS outputs were set to OUTx_CMOS_DRV = 3.
IOL/IOH
IDDO
Zs
VOL/VOH
OUT
OUT
AC Test Configuration
Trace length 5 inches
50 
499 
4.7 pF
DC Block
50 probe, scope
56 
50 
499 
4.7 pF
DC Block
50 probe, scope
56 
Rev. 1.0
11