SI5344H-42H Datasheet, PDF (1/56 Pages) Silicon Laboratories – HIGH-FREQUENCY,

Si5344H/42H Rev D
H IGH- F REQUENCY, U LTRA- L OW J ITTER A TTENUATOR C LOCK
WITH DIGITALLY-CONTROLLED OSCILLATOR
Features
 High-speed outputs generate an  Hitless input clock switching:
ultra-low jitter output up to 2.75 GHz automatic or manual
 Up to four Multi-Synth outputs
 Automatic free-run and holdover
generate any frequency up to
modes
717.5 MHz
 Glitchless on the fly output
 Input frequency range:
frequency changes
8 kHz to 750 MHz
 Locks to gapped clock inputs
 Maximum Output frequency:
 DCO mode: as low as 0.001 ppb
High-Frequency Mode: 2.75 GHz steps.
MultiSynth Mode: 717.5 MHz  Core voltage
 Jitter performance:
High Frequency Mode:
<50 fs typ (1 MHz–40 MHz)
MultiSynth Mode:
<150 fs typ (12 kHz–20 MHz)
 Programmable jitter attenuation
bandwidth: 10 Hz to 4 kHz
 Highly configurable outputs
compatible with LVDS, LVPECL,
LVCMOS, CML, and HCSL with
V_DD: 1.8 V ±5%
V_DDA: 3.3 V ±5%
 Independent output supply pins:
3.3 V, 2.5 V, or 1.8 V
 Serial interface: I²C or SPI
 In-circuit programmable with
non-volatile OTP memory
 ClockBuilder Pro^TM software
simplifies device configuration
programmable voltage swing and  Si5342H: 2 input, 2 output, QFN44
common mode
 Si5344H, 2 input, 4 output, QFN44
LVPECL-only in High Frequency _{ Temperature range: –40 to +85 °C}
Mode
 Pb-free, RoHS-6 compliant
 Status monitoring (LOS, OOF, LOL)
Applications
 100G/200G/400G Optical
Transceivers
 Wireless base-stations
Ordering Information:
See Section 7.
Pin Assignments
Si5342H 44QFN
Top View
IN1 1
IN1 2
IN_SEL0 3
X1 4
XA 5
XB 6
X2 7
VDDA 8
VDDA 9
NC 10
NC ¹¹
GND
Pad
33 INTR
32 VDD
31 LOS1
30 LOS0
29 VDDS
28 LOS_XAXB
27 LOL
26 VDDS
25 OUT1
24 OUT1
23 VDDO1
Description
This specialized jitter attenuating clock multiplier combines fourth-generation
DSPLL with ultra-low phase jitter and MultiSynth™ technologies to enable high
data rate coherent optical transceiver design. Up to four outputs can be assigned
to High Frequency Mode capable of up to 2.75 GHz at 50 fs-rms typical phase
jitter (1 MHz-40 MHz). Each output may also be configured as MultiSynth Mode
any-frequency outputs when added frequency flexibility is required, such as
clocking Forward Error Correction (FEC) while still delivering <150 fs-rms typical
phase jitter (12 kHz-20 MHz). The Si5344H and Si5342H also feature DCO-
control with as low as 0.001 ppb step control and locks to gapped clock inputs.
These devices are programmable via a serial interface with in-circuit
programmable non-volatile memory (NVM) so that they always power up with a
known frequency configuration. The loop filter is fully integrated on-chip
eliminating the risk of potential noise coupling associated with discrete solutions.
Programming the Si5342H/44H is made easy with Silicon Labs’ ClockBuilderPro
software. Factory preprogrammed devices are also available.
Si5344H 44QFN
Top View
IN1 1
IN1 2
IN_SEL0 3
XGND 4
XA 5
XB 6
XGND 7
VDDA 8
VDDA 9
NC 10
NC ¹¹
GND
Pad
33 INTR
32 VDD
31 OUT2
30 OUT2
29 VDDO2
28 LOS_XAXB
27 LOL
26 VDDS
25 OUT1
24 OUT1
23 VDDO1
Rev. 1.0 9/16
Copyright © 2016 by Silicon Laboratories
Si5344H/42H