SDA9361 Datasheet, PDF (43/47 Pages) Siemens Semiconductor Group – DDC-PLUS-Deflection Controller

SDA 9361
HSYNC
(odd field)
HSYNC
(even field)
2 _*FH
(internal)
VSYNC
VD-
VBL
(BSE = 0)
SCAN
4 Lines
123
1 23
d0
End of Scan
1 Line
appr. 0.5 Line + d0
Start of Scan
appr. 1 Line + d0
5.5 Lines
UED10282
Figure 10
Timing Diagram of SCAN if STE = 1
Semiconductor Group
43
1998-02-01