SDA9361 Datasheet, PDF (29/47 Pages) Siemens Semiconductor Group – DDC-PLUS-Deflection Controller

SDA 9361
Field = Constant
b) Case of STE = 1
In this case the control item Vertical blanking time is an extension for the V-blanking
pulse.
- If BSE = 1 and VBT = 0 the V-blanking pulse has its minimum: it starts always at
end of scan (line B in Fig. below) and ends at start of scan (line C) defined by the
control items Start Vertical Scan (if SSE = 1) and Vertical Scan.
- BSE = 1 and (128 > VBT > 0) extend the V-blanking pulse according to the following
relationship
(If VBT > 127 this value is ignored and replaced by VBT - 128):
VBL starts VBT / 2 lines (even field) respectively (VBT + 1) / 2 lines (odd field)
prior to line B.
VBL ends (VBT + 1) / 2 lines (even field) respectively VBT / 2 lines (odd field) after
end of line C.
Possible start points are only the beginning of line.
- If BSE = 0 (after power on) the control item Vertical Blanking Time is disabled and
VBL starts 4 lines prior to end of scan (line B) and ends 4 lines after start of scan
(line C).
HSYNC
B
123
C
VSYNC
1 Line
Start of odd Field
VD-
VBL
(BSE = 0)
VBL
(BSE = 1,
VBT = 0)
VBL
(BSE = 1,
VBT = 7)
4 Lines
3 Lines
B
Figure 6
Vertical Blanking Pulse VBL when STE = 1
Semiconductor Group
29
Start of even Field
Even
4 Lines
3 Lines
C
UED10262
1998-02-01