38K2 Datasheet, PDF (96/151 Pages) Renesas Technology Corp – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

38K2 Group
CLOCK GENERATING CIRCUIT
An oscillation circuit can be formed by connecting a resonator be-
tween XIN and XOUT. Use the circuit constants in accordance with
the resonator manufacturer’s recommended values. No external
resistor is needed between XIN and XOUT since a feed-back resis-
tor exists on-chip. (An external feed-back resistor may be needed
depending on conditions.)
Frequency Control
Either fSYN or f(XIN) can be selected as an internal system clock.
Furthermore, the frequency of internal clock φ can be selected by
the system clock division ratio selection bit.
(1) fSYN clock
fSYN clock is generated by the PLL circuit. f(XIN) or fVCO can be
selected as an input clock. When using as an internal system
clock, there is restriction on use. Refer to the clause of “PLL CIR-
CUIT”.
(2) f(XIN) clock
The frequency applied to the XIN pin is used as an internal system
clock frequency.
Oscillation Control
(1) Stop mode
If the STP instruction is executed, the internal clock φ stops at an
“H” level, and the XIN oscillator stops. When the oscillation stabi-
lizing time set after STP instruction released bit is “0,” the
prescaler 12 is set to “FF16” and timer 1 is set to “0116.” When the
oscillation stabilizing time set after STP instruction released bit is
“1,” set the sufficient time for oscillation of used oscillator to stabi-
lize since nothing is set to the prescaler 12 and timer 1. XIN
divided by 16 is compulsorily connected to the input of the
prescaler 12. Oscillator restarts when an external interrupt (includ-
ing USB resume interrupt) is received, but the internal clock φ
remains at “H” until timer 1 underflows. The internal clock φ is not
supplied until timer 1 underflows. Because the sufficient time is re-
quired for the oscillation to stabilize when a ceramic resonator etc.
is used. When the oscillator is restarted by reset, apply “L” level to
the RESET pin until the oscillation is stable since a wait time will
not be generated automatically.
(2) Wait mode
If the WIT instruction is executed, the internal clock φ stops at an
“H” level, but the oscillator does not stop. The internal clock φ re-
starts at reset or when an interrupt is received. Since the oscillator
does not stop, normal operation can be started immediately after
the clock is restarted.
To ensure that the interrupts will be received to release the STP or
WIT state, their interrupt enable bits must be set to “1” before ex-
ecuting of the STP or WIT instruction.
When releasing the STP state, the prescaler 12 and timer 1 will
start counting the clock XIN divided by 16. Accordingly, set the
timer 1 interrupt enable bit to “0” before executing the STP instruc-
tion.
sNote
When using the oscillation stabilizing time set after STP instruction
released bit set to “1”, evaluate time to stabilize oscillation of the
used oscillator and set the value to the timer 1 and prescaler 12.
Rev.3.00 Oct 15, 2006 page 96 of 147
REJ03B0193-0300