38K2 Datasheet, PDF (53/151 Pages) Renesas Technology Corp – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

38K2 Group
b7
b0
0 000000
EP10 control register 3 (EP10CON3) [address 001C16]
Bit symbol
Bit name
CTENDE10 Control transfer completion
enable bit
b7:b1
Not used
Fig. 77 Structure of EP10 control register 3
Function
At reset _{R W}
H/W S/W
0 : NAK transmission in the status stage
0 – OO
1 : Control transfer completion enabled (SIE transmits
NULL/ACK.) (Valid in PID10 = “012”)
At reception of SETUP token:
This bit is cleared to “0” by the hardware.
Write “0” when writing.
– – OO
“0” is read when reading.
–: State remaining
b7
000
b0
EP10 interrupt source register (EP10REQ) [address 001D16]
Bit symbol
Bit name
BRDY10
USB HUB/Endpoint 10 buffer
ready interrupt bit
CTEND10 USB HUB/Endpoint 10 control
transfer completion interrupt bit
CTSTS10 USB HUB/Endpoint 10 status
stage transition interrupt bit
BSRDY10 USB HUB/Endpoint 10 SETUP
buffer ready interrupt bit
ERR10
USB HUB/Endpoint 10 error
interrupt bit
b7:b5
Not used
Function
At reset _{R W}
H/W S/W
0: No interrupt request issued
0 0 OO
1: Interrupt request issued
This bit is set to “1” when the buffer is ready state
(enabled to be read/written) on USB HUB/Endpoint 10.
“0” can be set by software, but “1” cannot be set.
0: No interrupt request issued
0 0 OO
1: Interrupt request issued
This bit is set to “1” when control transfer is completed
(NULL/ACK transmission in the status stage) on USB
HUB/Endpoint 10.
“0” can be set by software, but “1” cannot be set.
0: No interrupt request issued
0 0 OO
1: Interrupt request issued
This bit is set to “1” when transition to status stage
occurs in CTENDE10 = “0” (control transfer completion
disabled) on USB HUB/Endpoint 10.
“0” can be set by software, but “1” cannot be set.
<Transition to status stage occurrence factor>
At transfer of control write:
When receiving IN-token in data stage (OUT)
At transfer of control read:
When receiving OUT-token in data stage (IN)
At no data transfer:
Nothing occurs.
0: No interrupt request issued
0 0 OO
1: Interrupt request issued
This bit is set to “1” when the exclusive buffer for
SETUP is ready state (enabled to be read) on USB
HUB/Endpoint 10.
“0” can be set by software, but “1” cannot be set.
0: No interrupt request issued
0 0 OO
1: Interrupt request issued
This bit is set to “1” when control transfer error occurs
on USB HUB/Endpoint 10.
This bit is cleared to “0” by the hardware when
receiving SETUP token.
“0” can be set by software, but “1” cannot be set.
Write “0” when writing.
– – OO
“0” is read when reading.
–: State remaining
Fig. 78 Structure of EP10 interrupt source register
Rev.3.00 Oct 15, 2006 page 53 of 147
REJ03B0193-0300