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38K2 Datasheet, PDF (45/151 Pages) Renesas Technology Corp – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER | |||
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38K2 Group
b7
b0
0 0 0 0 0 0 0 EP02 control register 2 (EP02CON2) [address 001B16]
Bit symbol
Bit name
B0VAL02 Buffer 0 enable bit
b7:b1
Not used
Fig. 58 Structure of EP02 control register 2
Function
At reset
RW
H/W S/W
When the selected endpoint is IN, writing â1â to this bit 0 â O O
makes the transmitting data a set state (SIE is possible
to read).
When the selected endpoint is OUT, writing â1â to this
bit makes data reception possible (SIE is possible to
write).
Write â0â when writing.
â â OO
â0â is read when reading.
â: State remaining
b7
b0
0 0 0 00 0 0
EP02 control register 3 (EP02CON3) [address 001C16]
Bit symbol
Bit name
B1VAL02 Buffer 1 enable bit
b7:b1
Not used
Function
At reset
RW
H/W S/W
When the selected endpoint is IN, writing â1â to this bit 0 â O O
makes the transmitting data a set state (SIE is possible
to read).
When the selected endpoint is OUT, writing â1â to this
bit makes data reception possible (SIE is possible to
write).
In double buffer mode this bit is valid.
Write â0â when writing.
â â OO
â0â is read when reading.
â: State remaining
Fig. 59 Structure of EP02 control register 3
b7
00000
b0
EP02 interrupt source register (EP02REQ) [address 001D16]
Bit symbol
B0RDY02
B1RDY02
ERR02
b7 to b3
Bit name
USB function/Endpoint 2 buffer 0
ready interrupt bit
USB function/Endpoint 2 buffer 1
ready interrupt bit
USB function/Endpoint 2 error
interrupt bit
Not used
Function
At reset R W
H/W S/W
0 : No interrupt request issued
0 0 OO
1 : Interrupt request issued
This bit is set to â1â when the buffer 0 is ready state
(enabled to be read/written) on USB function/Endpoint 2.
â0â can be set by software, but â1â cannot be set.
0 : No interrupt request issued
0 0 OO
1 : Interrupt request issued
In single buffer mode this bit is invalid.
This bit is set to â1â when the buffer 1 is ready state
(enabled to be read/written) on USB function/Endpoint 2
in double buffer mode.
â0â can be set by software, but â1â cannot be set.
0 : No interrupt request issued
0 0 OO
1 : Interrupt request issued
This bit is set to â1â when STALL response occurs on
USB function/Endpoint 2.
â0â can be set by software, but â1â cannot be set.
Write â0â when writing.
â â OO
â0â is read when reading.
Fig. 60 Structure of EP02 interrupt source register
Rev.3.00 Oct 15, 2006 page 45 of 147
REJ03B0193-0300
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