38K2 Datasheet, PDF (17/151 Pages) Renesas Technology Corp – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

38K2 Group
Fig. 13 Interrupt control
Interrupt request bit
Interrupt enable bit
Interrupt disable flag (I)
BRK instruction
Reset
Interrupt request
b7
b0
Interrupt edge selection register
(INTEDGE : address 0FF316)
INT0 interrupt edge selection bit
Not used (return “0” when read)
INT1 interrupt edge selection bit
Not used (return “0” when read)
0 : Falling edge active
1 : Rising edge active
b7
b0
b7
Interrupt request register 1
(IREQ1 : address 003C16)
USB bus reset interrupt request bit
USB SOF interrupt request bit
USB device interrupt request bit
EXB interrupt request bit
INT0 interrupt request bit
Timer X interrupt request bit
Timer 1 interrupt request bit
Timer 2 interrupt request bit
✽ “0” can be set by software, but “1”
cannot be set.
b0
Interrupt request register 2
(IREQ2 : address 003D16)
INT1 interrupt request bit
USB HUB interrupt request bit
Serial I/O receive interrupt request bit
Serial I/O transmit interrupt request bit
CNTR0 interrupt request bit
Key-on wake-up interrupt request bit
A/D conversion interrupt request bit
Nothing is arranged for this bit. This is a
write disabled bit. When this bit is read
out, the contents are “0”.
0 : No interrupt request issued
1 : Interrupt request issued
b7
b0
b7
Interrupt control register 1
(ICON1 : address 003E16)
USB bus reset interrupt enable bit
USB SOF interrupt enable bit
USB device interrupt enable bit
EXB interrupt enable bit
INT0 interrupt enable bit
Timer X interrupt enable bit
Timer 1 interrupt enable bit
Timer 2 interrupt enable bit
✽ “0” can be set by software, but “1”
cannot be set.
Fig. 14 Structure of interrupt-related registers
b0
Interrupt control register 2
(ICON2 : address 003F16)
INT1 interrupt enable bit
USB HUB interrupt enable bit
Serial I/O receive interrupt enable bit
Serial I/O transmit interrupt enable bit
CNTR0 interrupt enable bit
Key-on wake-up interrupt enable bit
A/D conversion interrupt enable bit
Fix this bit to “0”.
0 : Interrupts disabled
1 : Interrupts enabled
Rev.3.00 Oct 15, 2006 page 17 of 147
REJ03B0193-0300