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38K2 Datasheet, PDF (64/151 Pages) Renesas Technology Corp – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER | |||
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38K2 Group
(1) Downstream port 1
b7
0 00
b0
DP1 interrupt source register (DP1REQ) [address 002B16]
Bit symbol
PTDIS1
PTCON1
PTERR1
PTRSM1
PTCHG1
b7:b5
Bit name
Downstream port 1 disconnect
detection interrupt bit
Downstream port 1 connect
detection interrupt bit
Downstream port 1 port error
interrupt bit
Downstream port 1 resume
interrupt bit
Downstream port 1 bus-change
detection interrupt bit
Not used
Function
0: No interrupt request issued
At reset R W
H/W S/W
0 â OO
1: Interrupt request issued
This bit is set to â1â when detecting a bus-disconnect
state (2.5 µs or more of SE0) on a downstream port 1 in
DSCONN1 = â1â.
â0â can be set by software, but â1â cannot be set.
0: No interrupt request issued
0 â OO
1: Interrupt request issued
This bit is set to â1â when detecting a bus-connect
state (2.5 µs or more of J- or K- state) on a downstream
port 1 in DSCONN1 = â0â.
â0â can be set by software, but â1â cannot be set.
0: No interrupt request issued
0 â OO
1: Interrupt request issued
This bit is set to â1â when an error occurs on a
downstream port 1.
â0â can be set by software, but â1â cannot be set.
0: No interrupt request issued
0 â OO
1: Interrupt request issued
This bit is set to â1â when detecting a resume signal
on a downstream port 1 in the condition of HUB
suspended or port suspended state.
â0â can be set by software, but â1â cannot be set.
0: No interrupt request issued
0 â OO
1: Interrupt request issued
This bit is set to â1â when detecting a bus-change of a
downstream port 1 in the condition of HUB suspended
state. It is also â1â in the internal clock halted.
â0â can be set by software, but â1â cannot be set.
Write â0â when writing.
â â OO
â0â is read when reading.
â: State remaining
Fig. 96 Structure of DP1 interrupt source register
Rev.3.00 Oct 15, 2006 page 64 of 147
REJ03B0193-0300
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