M30218 Datasheet, PDF (92/179 Pages) Mitsubishi Electric Semiconductor – M30218 Group

Serial I/O
Mitsubishi microcomputers
M30218 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
UARTi transmit/receive control register 1
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
UiC1(i=0,1)
Address
When reset
03A516, 03AD16
0216
Bit
symbol
Bit name
TE
Transmit enable bit
TI
Transmit buffer empty
flag
RE
Receive enable bit
RI
Receive complete flag
Function
(During clock synchronous serial
I/O mode)
Function
(During UART mode)
0 : Transmission disabled
1 : Transmission enabled
0 : Transmission disabled
1 : Transmission enabled
0 : Data present in
transmit buffer register
1 : No data present in
transmit buffer register
0 : Data present in
transmit buffer register
1 : No data present in
transmit buffer register
0 : Reception disabled
1 : Reception enabled
0 : Reception disabled
1 : Reception enabled
0 : No data present in
receive buffer register
1 : Data present in
receive buffer register
0 : No data present in
receive buffer register
1 : Data present in
receive buffer register
Nothing is assigned.
In an attempt to write to this bit, write “0”. The value, if read, turns out to be “0”.
RW
UART transmit/receive control register 2
b7 b6 b5 b4 b3 b2 b1 b0
0
Symbol
UCON
Address
03B016
When reset
X00000002
Bit
symbol
Bit name
U0IRS UART0 transmit
interrupt cause select bit
Function
(During clock synchronous serial
I/O mode)
Function
(During UART mode)
RW
0 : Transmit buffer empty (Tl = 1)
1 : Transmission completed
(TXEPT = 1)
0 : Transmit buffer empty (Tl = 1)
1 : Transmission completed
(TXEPT = 1)
U1IRS UART1 transmit
interrupt cause select bit
0 : Transmit buffer empty (Tl = 1)
1 : Transmission completed
(TXEPT = 1)
0 : Transmit buffer empty (Tl = 1)
1 : Transmission completed
(TXEPT = 1)
U0RRM UART0 continuous receive
mode enable bit
0 : Continuous receive
mode disabled
1 : Continuous receive
mode enable
Invalid
U1RRM UART1 continuous receive
mode enable bit
0 : Continuous receive
mode disabled
1 : Continuous receive
mode enabled
Invalid
CLKMD0 CLK/CLKS select bit 0
Valid when bit 5 = “1”
0 : Clock output to CLK1
1 : Clock output to CLKS1
Invalid
CLKMD1 CLK/CLKS select bit 1
(Note)
0 : Normal mode
(CLK output is CLK1 only)
1 : Transfer clock output
from multiple pins
function selected
Must always be “0”
Reserved bit
Must always be “0”
Must always be “0”
Nothing is assigned.
In an attempt to write to this bit, write “0”. The value, if read, turns out to be indeterminate.
Note: When using multiple pins to output the transfer clock, the following requirement must be met:
• UART1 internal/external clock select bit (bit 3 at address 03A816) = “0”.
Figure GA-5. Serial I/O-related registers (3)
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