M30218 Datasheet, PDF (108/179 Pages) Mitsubishi Electric Semiconductor – M30218 Group

Serial I/O2
Mitsubishi microcomputers
M30218 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
When the internal synchronous clock is selected, automatic serial transfer starts by writing 1 less than
the number of transfer bytes to the transfer counter (address 034616). When an external sync clock is
selected, automatic serial transfer starts by writing 1 less than the number of transfer bytes to the
transfer counter and the transfer clock is input. In this case, allow for at least 5 cycles of internal
system clock before the transfer clock is input after writing to the transfer counter.
Also, for data to data transfer intervals, allow at least 5 cycles of internal system clock reckoning from
a rise of clock at the last bit of one-byte data.
Regardless of whether the internal or external synchronous clock is selected, the automatic transfer
data pointer and the transfer counter are decreased after each 1-byte data is received and then written
into the automatic transfer RAM. The serial transfer status flag (bit5 of address 034416) is set to “1” by
writing data into the transfer counter. The serial transfer status flag is reset to “0” after the last data is
written into the automatic transfer RAM. At the same time, a serial I/O2 interrupt request occurs.
The values written in the automatic transfer data pointer (address 034016) and the automatic transfer
interval set bits (bit 0 to bit 4 of address 034816) are held in the latch.
When data is written into the transfer counter, the values latched in the automatic transfer data pointer
(address 034016) and the automatic transfer interval set bits (bit 0 to bit 4) are transferred to the
decrement counter.
Automatic transfer
data pointer
5216
Automatic transfer RAM
004FF16
0045216
0045116
0045016
0044F16
0044E16
Transfer counter
0416
0040016
SIN2
Serial I/O2 register
SOUT2
Figure GA-5. Automatic Transfer Serial I/O Operation
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