M30218 Datasheet, PDF (88/179 Pages) Mitsubishi Electric Semiconductor – M30218 Group

Serial I/O
Mitsubishi microcomputers
M30218 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Serial I/O
Serial I/O is configured as two channels: UART0 and UART1.
UART0 and UART1 each have an exclusive timer to generate a transfer clock, so they operate independently of each other.
Figure GA-1 shows the block diagram of UART0 and UART1. Figures GA-2 shows the block diagram of the transmit/receive unit.
UARTi (i=0, 1) has two operation modes: a clock synchronous serial I/O mode and a clock asynchronous
serial I/O mode (UART mode). The contents of the serial I/O mode select bits (bits 0 to 2 at addresses
03A016 and 03A816) determine whether UARTi is used as a clock synchronous serial I/O or as a UART.
Although a few function are different, UART0 and UART1 have almost same functions.
Figures GA-3 through GA-5 show the registers related to UARTi.
(UART0)
RxD0
Clock source selection
f1
f8
Internal
f32
Bit rate generator
(address 03A116)
1 / (m+1)
External
UART reception
1/16
Clock synchronous type
Reception control
circuit
UART transmission
1/16
Clock synchronous type
Transmission
control circuit
Clock synchronous type
(when internal clock is selected)
1/2
Receive clock
Transmit/
receive
unit
Transmit
clock
CLK0
CTS0 / RTS0
Clock synchronous type
(when internal clock is selected)
Polarity
reversing
circuit
CTS/RTS selected
CTS/RTS disabled
Vcc
CTS/RTS disabled
Clock synchronous type
(when external clock is
selected)
RTS0
CTS0
TxD0
(UART1)
RxD1
Clock source selection
f1
f8
Internal
f32
Bit rate generator
(address 03A916)
1 / (n+1)
External
UART reception
1/16
Clock synchronous type
UART transmission
1/16
Clock synchronous type
Reception control
circuit
Receive
clock
Transmit/
receive
unit
Transmission
control circuit
Transmit
clock
Clock synchronous type
(when internal clock is selected)
1/2
CLK1
CTS1 / RTS1
CLKS1
Clock synchronous type
(when internal clock is selected)
Clock synchronous type
(when external clock is selected)
Polarity
reversing
circuit
Clock output pin
select switch
CTS/RTS disabled
RTS1
VCC
CTS/RTS disabled
CTS1
TxD1
Figure GA-1. Block diagram of UARTi (i = 0, 1)
m: Values set to UART0 bit rate generator (U0BRG)
n : Values set to UART1 bit rate generator (U1BRG)
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