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M30218 Datasheet, PDF (60/179 Pages) Mitsubishi Electric Semiconductor – M30218 Group
FLD controller
Mitsubishi microcomputers
M30218 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
FLD automatic display pins
P0 to P6 are the pins capable of automatic display output for the FLD. The FLD start operating by setting
the automatic display control bit (bit 0 at address 035016) to “1”. There is the FLD output function that
outputs RAM contents from the port every timing or the digit output function that drives the port high with
digit timing. The FLD can be displayed using the FLD output for the segments and the digit or FLD output for
the digits. When using the FLD output for the digits, be sure to write digit display patterns to the RAM in
advance. The remaining segment and digit lines can be used as general-purpose ports. Settings of each
port are shown below.
Table KA-1. Pins in FLD Automatic Display Mode
Port Name Automatic Display Pins Setting Method
P5, P6
FLD0 to FLD15
The individual bits of the digit output set register (address 035C16,
035D16) can set each pin either FLD port (“0”) or digit port (“1”).
When the pins are set for the digit port, the digit pulse output func-
tion is enabled, so the digit pulses can always be output regardless
the value of FLD automatic display RAM.
P0, P1
FLD16 to FLD31
FLD exclusive use port (automatic display control bit (bit 0 of ad-
dress 035016)=“1”)
P2, P3, FLD32 to FLD51
The individual bits of the FLD/port switch register (addresses
P44 to P43
035916 to 035B16) can set each pin to either FLD port (“1”) or gen-
eral-purpose port (“0”).
P44 to P47 FLD52 to FLD55
The individual bits of the FLD/port switch register (address 035B16)
can set each pin to either FLD port (“1”) or general-purpose port
(“0”). The digit pulse output function turns to available, and the digit
pulse can output by setting of the FLD output set register (address
035116). The port output format is the CMOS output. When using
the port as a display pin, a driver must be installed externally.
Setting example 1
Shown below is a register setup example where only FLD output is used.
In this case, the digit display output pattern must be set in the FLD automatic
display RAM in advance.
Number of segments 36
Number of digits
16
The contents of digit output set register
(035C16, 035D16)
Setting example 2
Shown below is a register setup example where both FLD output and digit waveform
output are used. In this case, because the digit display output is automatically
generated, there is no need to set the display pattern in the FLD automatic display RAM.
Number of segments 28
Number of digits
12
The contents of digit output set register
(035C16, 035D16)
Port P6
Port P5
Port P0
Port P1
FLD0(DIG output)
0
FLD1(DIG output) 0
FLD2(DIG output) 0
FLD3(DIG output) 0
FLD4(DIG output) 0
FLD5(DIG output) 0
FLD6(DIG output) 0
FLD7(DIG output) 0
FLD8(DIG output) 0
FLD9(DIG output) 0
FLD10(DIG output) 0
FLD11(DIG output) 0
FLD12(DIG output) 0
FLD13(DIG output) 0
FLD14(DIG output) 0
FLD15(DIG output) 0
FLD16(SEG output)
FLD17(SEG output)
FLD18(SEG output)
FLD19(SEG output)
FLD20(SEG output)
FLD21(SEG output)
FLD22(SEG output)
FLD23(SEG output)
FLD24(SEG output)
FLD25(SEG output)
FLD26(SEG output)
FLD27(SEG output)
FLD28(SEG output)
FLD29(SEG output)
FLD30(SEG output)
FLD31(SEG output)
FLD/port switch register
(035916, 035B16)
Port P2
Port P3
Port P4
1 FLD32(SEG output)
1 FLD33(SEG output)
1 FLD34(SEG output)
1 FLD35(SEG output)
1 FLD36(SEG output)
1 FLD37(SEG output)
1 FLD38(SEG output)
1 FLD39(SEG output)
1 FLD40(SEG output)
1 FLD41(SEG output)
1 FLD42(SEG output)
1 FLD43(SEG output)
1 FLD44(SEG output)
1 FLD45(SEG output)
1 FLD46(SEG output)
1 FLD47(SEG output)
1 FLD48(SEG output)
1 FLD49(SEG output)
1 FLD50(SEG output)
1 FLD51(SEG output)
0 FLD52(port output)
0 FLD53(port output)
0 FLD54(port output)
0 FLD55(port output)
DIG output : This output is connected to digit of the FLD.
SEG output : This output is connected to segment of the FLD.
Port output : This output is general-purpose port ( used program).
Port P6
Port P5
Port P0
Port P1
FLD0(DIG output) 1
FLD1(DIG output) 1
FLD2(DIG output) 1
FLD3(DIG output) 1
FLD4(DIG output) 1
FLD5(DIG output) 1
FLD6(DIG output) 1
FLD7(DIG output) 1
FLD/port switch register
(035916, 035B16)
FLD8(DIG output) 1
FLD9(DIG output) 1
FLD10(DIG output) 1
FLD11(DIG output) 1
FLD12(SEG output) 0
FLD13(SEG output) 0
FLD14(SEG output) 0
FLD15(SEG output) 0
FLD16(SEG output)
FLD17(SEG output)
FLD18(SEG output)
FLD19(SEG output)
FLD20(SEG output)
FLD21(SEG output)
FLD22(SEG output)
FLD23(SEG output)
FLD24(SEG output)
FLD25(SEG output)
FLD26(SEG output)
FLD27(SEG output)
FLD28(SEG output)
FLD29(SEG output)
FLD30(SEG output)
FLD31(SEG output)
Port P2
Port P3
Port P4
1 FLD32(SEG output)
1 FLD33(SEG output)
1 FLD34(SEG output)
1 FLD35(SEG output)
1 FLD36(SEG output)
1 FLD37(SEG output)
1 FLD38(SEG output)
1 FLD39(SEG output)
1 FLD40(SEG output)
1 FLD41(SEG output)
1 FLD42(SEG output)
1 FLD43(SEG output)
0 FLD44(port output)
0 FLD45(port output)
0 FLD46(port output)
0 FLD47(port output)
0 FLD48(port output)
0 FLD49(port output)
0 FLD50(port output)
0 FLD51(port output)
0 FLD52(port output)
0 FLD53(port output)
0 FLD54(port output)
0 FLD55(port output)
DIG output : This output is connected to digit of the FLD.
SEG output : This output is connected to segment of the FLD.
Port output : This output is general-purpose port ( used program).
Figure KA-3. Segment/Digit Setting Example
59