M16C62N Datasheet, PDF (88/213 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Serial I/O
Mitsubishi microcomputers
M16C / 62N Group (80-pin)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
(UART0)
RxD0
Clock source selection
f1
f8
Bit rate generator
Internal (address 03A116)
f32
1 / (n0+1)
External
UART reception
1/16
Clock synchronous type
Reception
control circuit
UART transmission
1/16
Clock synchronous type
Transmission
control circuit
Clock synchronous type
(when internal clock is selected)
1/2
CLK0
CTS0 / RTS0
Clock synchronous type
(when internal clock is selected)
CLK
polarity
reversing
circuit
CTS/RTS disabled
CTS/RTS selected
Vcc
CTS/RTS disabled
Clock synchronous type
(when external clock is
selected)
RTS0
CTS0
Receive
clock
Transmit
clock
Transmit/
receive
unit
TxD0
(UART1)
RxD1
Clock source selection
f1
Bit rate generator
f8
Internal (address 03A916)
f32
1 / (n1+1)
External
UART reception
1/16
Clock synchronous type
Reception
control circuit
UART transmission
1/16
Clock synchronous type
Clock synchronous type
(when internal clock is selected)
1/2
Transmission
control circuit
CLK1
CTS1 / RTS1
/ CLKS1
CLK
polarity
reversing
circuit
Clock synchronous type
(when internal clock is selected)
Clock synchronous type
(when external clock is
selected)
CTS/RTS disabled
CTS/RTS selected
Clock output pin
select switch
VCC
CTS/RTS disabled
RTS1
CTS1
Receive
clock
Transmit
clock
Transmit/
receive
unit
TxD1
(UART2)
RxD2
RxD polarity
reversing circuit
Clock source selection
f1
f8
Bit rate generator
Internal _{(address 037916)}
f32
1 / (n2+1)
UART reception
1/16
Clock synchronous type
UART transmission
1/16
Clock synchronous type
Reception
control circuit
Transmission
control circuit
Clock synchronous type
(when internal clock is selected)
1/2
Receive
clock
Transmit
clock
Transmit/
receive
unit
TxD
polarity
reversing
circuit
TxD2
Note: CLK and CTS/RTS of UART2 do not connect to outside.
Clock synchronous serial I/O mode cannot be used in UART2.
n0 : Values set to UART0 bit rate generator (U0BRG)
n1 : Values set to UART1 bit rate generator (U1BRG)
n2 : Values set to UART2 bit rate generator (U2BRG)
Figure 1.14.1. Block diagram of UARTi (i = 0 to 2)
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