M16C62N Datasheet, PDF (51/213 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Interrupt
Mitsubishi microcomputers
M16C / 62N Group (80-pin)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Priority level of each interrupt
INT1
Timer B2
Level 0 (initial value)
High
Timer B0
Timer A3
Timer A1
Timer B4
INT2
INT0
Timer B1
Timer A4
Timer A2
Timer B3
Timer B5
UART1 reception
UART0 reception
UART2 reception/ACK
Priority of peripheral I/O interrupts
(if priority levels are same)
A-D conversion
DMA1
Bus collision detection
Serial I/O4
Timer A0
UART1 transmission
UART0 transmission
UART2 transmission/NACK
Key input interrupt
DMA0
Serial I/O3
Processor interrupt priority level (IPL)
Low
Interrupt request level judgment output
to clock generating circuit (Fig.1.9.3)
Interrupt enable flag (I flag)
Address match
Watchdog timer
DBC
NMI
Reset
Interrupt
request
accepted
Figure 1.10.9. Maskable interrupts priorities (peripheral I/O interrupts)
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