M16C62N Datasheet, PDF (84/213 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Timer B
Mitsubishi microcomputers
M16C / 62N Group (80-pin)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
(2) Event counter mode
In this mode, the timer counts an external signal or an internal timer's overflow. (See Table 1.13.7.)
However, timer B1 works exclusively as an internal timer because timer B1 does not have input port.
Figure 1.13.18 shows the timer Bi mode register in event counter mode.
Table 1.13.7. Timer specifications in event counter mode
Item
Specification
Count source
• External signals input to TBiIN pin
• Effective edge of count source can be a rising edge, a falling edge, or falling
and rising edges as selected by software
Count operation
• Counts down
• When the timer underflows, it reloads the reload register contents before
continuing counting
Divide ratio
1/(n+1)
n : Set value
Count start condition
Count start flag is set (= 1)
Count stop condition
Count start flag is reset (= 0)
Interrupt request generation timing The timer underflows
TBiIN pin function
Count source input
Read from timer
Count value can be read out by reading timer Bi register
Write to timer
• When counting stopped
When a value is written to timer Bi register, it is written to both reload register and counter
• When counting in progress
When a value is written to timer Bi register, it is written to only reload register
(Transferred to counter at next reload time)
Note: Timer B1 works exclusively as an internal timer since timer B1 does not have input port (TB1IN).
Timer Bi mode register
b7 b6 b5 b4 b3 b2 b1 b0
01
Symbol
TBiMR(i=0 to 5)
Address
039B16 to 039D16
035B16 to 035D16
When reset
00XX00002
00XX00002
Bit symbol
TMOD0
TMOD1
MR0
MR1
Bit name
Function
Operation mode select bit ^{b1 b0}
0 1 : Event counter mode
Count polarity select
bit (Note 1)
b3 b2
0 0 : Counts external signal's
falling edges
0 1 : Counts external signal's
rising edges
1 0 : Counts external signal's
falling and rising edges
1 1 : Must not be set
RW
MR2
MR3
0 (Must always be “0” in event counter mode; i = 0, 3)
Nothing is assigned (i = 1, 2, 4, 5).
In an attempt to write to this bit, write “0”. The value, if read, turns out
to be indeterminate.
Invalid in event counter mode.
In an attempt to write to this bit, write “0”. The value, if read in
event counter mode, turns out to be indeterminate.
(Note 2)
(Note 3)
TCK0
Invalid in event counter mode. Can be “0” or “1”.
TCK1
Event clock select (Note 5) 0 : Input from TBiIN pin (Note 4)
1 : TBj overflow
(j = i – 1; however, j = 2 when i = 0,
j = 5 when i = 3)
Note 1: Valid only when input from the TBiIN pin is selected as the event clock.
If TBj overflow is selected, this bit can be “0” or “1”.
Note 2: Timer B0, timer B3.
Note 3: Timer B1, timer B2, timer B4, timer B5.
Note 4: Set the corresponding port direction register to “0”.
Note 5: Must always “1” in timer B1 mode register because timer B1 does not have input port.
Figure 1.13.18. Timer Bi mode register in event counter mode
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