RX113_16 Datasheet, PDF (75/131 Pages) Renesas Technology Corp – 32 MHz, 32-bit RX MCUs, 50 DMIPS, up to 512 Kbytes of flash memory

RX113 Group
5. Electrical Characteristics
5.3 AC Characteristics
5.3.1
Clock Timing
Table 5.19 Operation Frequency Value (High-Speed Operating Mode)
Conditions: 1.8 V ≤ VCC = VCC_USB ≤ 3.6 V, 1.8 V ≤ AVCC0 ≤ 3.6 V, VSS = AVSS0 = VSS_USB = 0 V, T_a = –40 to +105°C
VCC
Item
Symbol
1.8 to 2.4 V 2.4 to 2.7 V
2.7 to 3.6 V
When USB
in Use*⁴
Unit
Maximum
operating
frequency
System clock (ICLK)
FlashIF clock (FCLK)*^1, *²
Peripheral module clock (PCLKB)
f_max
8
8
8
16
32
16
32
16
32
32
MHz
32
32
Peripheral module clock (PCLKD)*³
8
16
32
32
USB clock (UCLK)
f_usb
—
—
—
48
Note 1. The lower-limit frequency of FCLK is 1 MHz during programming or erasing of the flash memory. When using FCLK at below
4 MHz, the frequency can be set to 1 MHz, 2 MHz, or 3 MHz. A non-integer frequency such as 1.5 MHz cannot be set.
Note 2. The frequency accuracy of FCLK should be ±3.5%. Confirm the frequency accuracy of the clock source.
Note 3. The lower-limit frequency of PCLKD is 4 MHz at 2.4 V or above and 1 MHz at below 2.4 V when the A/D converter is in use.
Note 4. The VCC_USB range is 3.0 to 3.6 V when the USB clock is in use.
Table 5.20 Operation Frequency Value (Middle-Speed Operating Mode)
Conditions: 1.8 V ≤ VCC = VCC_USB ≤ 3.6 V, 1.8 V ≤ AVCC0 ≤ 3.6 V, VSS = AVSS0 = VSS_USB = 0 V, T_a = –40 to +105°C
VCC
Item
Symbol
1.8 to 2.4 V 2.4 to 2.7 V
2.7 to 3.6 V
When USB
in Use*⁴
Unit
Maximum
operating
frequency
System clock (ICLK)
FlashIF clock (FCLK)*^1, *²
Peripheral module clock (PCLKB)
f_max
8
8
8
12
12
12
12
12
12
12
MHz
12
12
Peripheral module clock (PCLKD)*³
8
12
12
12
USB clock (UCLK)
f_usb
—
—
—
48
Note 1. The lower-limit frequency of FCLK is 1 MHz during programming or erasing of the flash memory. When using FCLK at below
4 MHz, the frequency can be set to 1 MHz, 2 MHz, or 3 MHz. A non-integer frequency such as 1.5 MHz cannot be set.
Note 2. The frequency accuracy of FCLK should be ±3.5%.
Note 3. The lower-limit frequency of PCLKD is 4 MHz at 2.4 V or above and 1 MHz at below 2.4 V when the A/D converter is in use.
Note 4. The VCC_USB range is 3.0 to 3.6 V when the USB clock is in use.
Table 5.21 Operation Frequency Value (Low-Speed Operating Mode)
Conditions: 1.8 V ≤ VCC = VCC_USB ≤ 3.6 V, 1.8 V ≤ AVCC0 ≤ 3.6 V, VSS = AVSS0 = VSS_USB = 0 V, T_a = –40 to +105°C
VCC
Item
Symbol
Unit
1.8 to 2.4 V
2.4 to 2.7 V
2.7 to 3.6 V
Maximum
System clock (ICLK)
f_max
operating
frequency
FlashIF clock (FCLK)*¹
Peripheral module clock (PCLKB)
32.768
kHz
32.768
32.768
Peripheral module clock (PCLKD)*²
32.768
Note 1. Programming and erasing the flash memory is impossible.
Note 2. The A/D converter cannot be used.
R01DS0216EJ0110 Rev.1.10
Mar 31, 2016
Page 75 of 131