RX113_16 Datasheet, PDF (46/131 Pages) Renesas Technology Corp – 32 MHz, 32-bit RX MCUs, 50 DMIPS, up to 512 Kbytes of flash memory

RX113 Group
Table 4.1
List of I/O Registers (Address Order) (17/23)
Address
Module
Symbol
0008 C04Bh PORTB
Port Input Data Register
Register Name
0008 C04Ch PORTC
Port Input Data Register
0008 C04Dh PORTD
Port Input Data Register
0008 C04Eh PORTE
Port Input Data Register
0008 C04Fh PORTF
Port Input Data Register
0008 C051h PORTH
Port Input Data Register
0008 C052h PORTJ
Port Input Data Register
0008 C060h PORT0
0008 C061h PORT1
0008 C062h PORT2
0008 C063h PORT3
0008 C064h PORT4
0008 C065h PORT5
0008 C069h PORT9
0008 C06Ah PORTA
0008 C06Bh PORTB
0008 C06Ch PORTC
0008 C06Dh PORTD
0008 C06Eh PORTE
0008 C06Fh PORTF
0008 C071h PORTH
0008 C072h PORTJ
0008 C080h PORT0
0008 C081h PORT0
0008 C082h PORT1
0008 C083h PORT1
0008 C084h PORT2
0008 C085h PORT2
0008 C086h PORT3
0008 C08Ah PORT5
0008 C08Bh PORT5
0008 C094h PORTA
0008 C095h PORTA
0008 C096h PORTB
0008 C097h PORTB
0008 C098h PORTC
0008 C099h PORTC
0008 C09Ch PORTE
0008 C09Dh PORTE
0008 C0A4h PORTJ
0008 C0C0h PORT0
Port Mode Register
Port Mode Register
Port Mode Register
Port Mode Register
Port Mode Register
Port Mode Register
Port Mode Register
Port Mode Register
Port Mode Register
Port Mode Register
Port Mode Register
Port Mode Register
Port Mode Register
Port Mode Register
Port Mode Register
Open Drain Control Register 0
Open Drain Control Register 1
Open Drain Control Register 0
Open Drain Control Register 1
Open Drain Control Register 0
Open Drain Control Register 1
Open Drain Control Register 0
Open Drain Control Register 0
Open Drain Control Register 1
Open Drain Control Register 0
Open Drain Control Register 1
Open Drain Control Register 0
Open Drain Control Register 1
Open Drain Control Register 0
Open Drain Control Register 1
Open Drain Control Register 0
Open Drain Control Register 1
Open Drain Control Register 0
Pull-Up Control Register
R01DS0216EJ0110 Rev.1.10
Mar 31, 2016
4. I/O Registers
Register
Symbol
PIDR
PIDR
PIDR
PIDR
PIDR
PIDR
PIDR
PMR
PMR
PMR
PMR
PMR
PMR
PMR
PMR
PMR
PMR
PMR
PMR
PMR
PMR
PMR
ODR0
ODR1
ODR0
ODR1
ODR0
ODR1
ODR0
ODR0
ODR1
ODR0
ODR1
ODR0
ODR1
ODR0
ODR1
ODR0
ODR1
ODR0
PCR
Number of
Bits
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
Access
Size
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8, 16
8, 16
8, 16
8, 16
8, 16
8, 16
8, 16
8, 16
8, 16
8, 16
8, 16
8, 16
8, 16
8, 16
8, 16
8, 16
8, 16
8, 16
8
Number of Access
States
3 or 4 PCLKB cycles
when reading,
2 or 3 PCLKB cycles
when writing
3 or 4 PCLKB cycles
when reading,
2 or 3 PCLKB cycles
when writing
3 or 4 PCLKB cycles
when reading,
2 or 3 PCLKB cycles
when writing
3 or 4 PCLKB cycles
when reading,
2 or 3 PCLKB cycles
when writing
3 or 4 PCLKB cycles
when reading,
2 or 3 PCLKB cycles
when writing
3 or 4 PCLKB cycles
when reading,
2 or 3 PCLKB cycles
when writing
3 or 4 PCLKB cycles
when reading,
2 or 3 PCLKB cycles
when writing
2 or 3 PCLKB
2 or 3 PCLKB
2 or 3 PCLKB
2 or 3 PCLKB
2 or 3 PCLKB
2 or 3 PCLKB
2 or 3 PCLKB
2 or 3 PCLKB
2 or 3 PCLKB
2 or 3 PCLKB
2 or 3 PCLKB
2 or 3 PCLKB
2 or 3 PCLKB
2 or 3 PCLKB
2 or 3 PCLKB
2 or 3 PCLKB
2 or 3 PCLKB
2 or 3 PCLKB
2 or 3 PCLKB
2 or 3 PCLKB
2 or 3 PCLKB
2 or 3 PCLKB
2 or 3 PCLKB
2 or 3 PCLKB
2 or 3 PCLKB
2 or 3 PCLKB
2 or 3 PCLKB
2 or 3 PCLKB
2 or 3 PCLKB
2 or 3 PCLKB
2 or 3 PCLKB
2 or 3 PCLKB
2 or 3 PCLKB
2 or 3 PCLKB
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