RX113_16 Datasheet, PDF (113/131 Pages) Renesas Technology Corp – 32 MHz, 32-bit RX MCUs, 50 DMIPS, up to 512 Kbytes of flash memory

RX113 Group
5. Electrical Characteristics
5.9.3
Capacitor Split Method
Table 5.54 Capacitor Split Method
Conditions: 2.2 V ≤ VCC = VCC_USB ≤ 3.6 V, 2.2 V ≤ AVCC0 ≤ 3.6 V, VSS = AVSS0 = VSS_USB = 0 V, T_a = –40 to +105°C
Item
Symbol Min.
Typ.
Max.
Unit
Test
Conditions
External capacitance connected between CAPH and CAPL pins
C1
0.33
0.47
0.61
μF
External capacitor connected to V_L1 pin
External capacitor connected to V_L2 pin
External capacitor connected to V_L3 pin
External capacitor connected to V_L4 pin
C2
0.33
0.47
0.61
μF
C3
0.33
0.47
0.61
μF
C4
0.33
0.47
0.61
μF
C5
0.33
0.47
0.61
μF
(1) 1/3 Bias Method
Table 5.55 Capacitor Split Method LCD Characteristics
Conditions: 2.2 V ≤ VCC = VCC_USB ≤ 3.6 V, 2.2 V ≤ AVCC0 ≤ 3.6 V, VSS = AVSS0 = VSS_USB = 0 V, T_a = –40 to +105°C
Item
Symbol
Conditions
Min.
Typ.
Max.
Unit
Test
Conditions
V_L4 voltage*¹
V_L4 C1 to C4 connected
—
VCC
—
V
V_L2 voltage*¹
V_L2 C1 to C4 connected 2/3V_L4-0.07 2/3V_L4 2/3V_L4+0.07
V
V_L1 voltage**¹
V_L1 C1 to C4 connected 1/3V_L4-0.08 2/3V_L4 2/3V_L4+0.08
V
Capacitor split wait time*¹
t_WAIT
100
—
—
ms
Note 1. This is the wait time from when voltage bucking is started (VLCON = 1) until display is enabled (LCDON = 1).
MDSET1,
00b
MDSET0
VLCON
01b or 10b
t_VL1S
LCDON
t_VLWT, t_WAIT
Figure 5.61 LCD Reference Voltage Setup Time, Voltage Boosting Wait Time, and Capacitor Split
Wait Time
R01DS0216EJ0110 Rev.1.10
Mar 31, 2016
Page 113 of 131