RX113_16 Datasheet, PDF (1/131 Pages) Renesas Technology Corp – 32 MHz, 32-bit RX MCUs, 50 DMIPS, up to 512 Kbytes of flash memory

Datasheet
RX113 Group
Renesas MCUs
32 MHz, 32-bit RX MCUs, 50 DMIPS, up to 512 Kbytes of flash memory,
R01DS0216EJ0110
Rev.1.10
Mar 31, 2016
USB 2.0 full-speed host/function/OTG, up to 12 comms channels, serial sound interface,
LCD controller/driver, capacitive touch sensing unit, 12-bit A/D, 12-bit D/A, RTC
Features
■ 32-bit RX CPU core
 32 MHz maximum operating frequency
Capable of 50 DMIPS when operating at 32 MHz
 Accumulator handles 64-bit results (for a single instruction) from 32-
bit × 32-bit operations
 Multiplication and division unit handles 32-bit × 32-bit operations
(multiplication instructions take one CPU clock cycle)
 Fast interrupt
 CISC Harvard architecture with five-stage pipeline
 Variable-length instruction format, ultra-compact code
 On-chip debugging circuit
■ Low power consumption functions
 Operation from a single 1.8 to 3.6 V supply
 Three low power consumption modes
 Low power timer (LPT) that operates during the software standby
state
 Supply current
High-speed operating mode: 0.11 mA/MHz
Software standby mode: 0.44 μA
 Recovery time from software standby mode: 4.8 μs
■ On-chip flash memory for code, no wait states
 Operation at 32 MHz, read cycle of 31.25 ns
 No wait states for reading at full CPU speed
 128 to 512 Kbyte capacities
 Programmable at 1.8 V
 For instructions and operands
■ On-chip data flash memory
 8 Kbytes
1,000,000 Erase/Write cycles (typ.)
 BGO (Background Operation)
■ On-chip SRAM, no wait states
 32 and 64 Kbyte capacities
■ Data transfer controller (DTC)
 Four transfer modes
 Transfer can be set for each interrupt source.
■ Event link controller (ELC)
 Module operation can be initiated by event signals without going
through interrupts.
 Link operation between modules is possible while the CPU is
sleeping.
■ Reset and power supply voltage management
 Six types including Power-On Reset (POR)
 Low voltage detection (LVD) with voltage settings
■ Clock functions
 External clock input frequency: Up to 20 MHz
 Main clock oscillator frequency: 1 to 20 MHz
 Sub-clock oscillator frequency: 32.768 kHz
 PLL circuit input: 4 to 8 MHz
 Low-speed on-chip oscillator: 4 MHz
 High-speed on-chip oscillator: 32 MHz ±1% (20 to 85°C)
 USB-dedicated PLL circuit: 6 and 8 MHz
 IWDT-dedicated on-chip oscillator: 15 kHz
 Generate a dedicated 32.768-kHz clock for the RTC
 On-chip clock frequency accuracy measurement circuit (CAC)
■ Realtime clock (RTC)
 30-second, leap year, and error adjustment functions
 Calendar count mode or binary count mode selectable
 Capable of initiating exit from software standby mode
■ Independent watchdog timer (IWDT)
 15-kHz on-chip oscillator produces a dedicated clock signal to drive
IWDT operation.
■ On-chip functions for IEC 60730 compliance
 Clock frequency accuracy measurement circuit, IWDT, functions to
assist in RAM testing, etc.
PLQP0100KB-A 14 × 14 mm, 0.5 mm pitch
PLQP0064KB-A 10 × 10 mm, 0.5 mm pitch
PTLG0100JA-A 7 × 7 mm, 0.65 mm pitch
■ Up to 12 channels for communication
 USB: USB 2.0 host/function/On-The-Go (OTG) (one channel), full-
speed = 12 Mbps, low-speed = 1.5 Mbps, isochronous transfer, and
BC (Battery Charger) supported
 SCI: Asynchronous mode, clock synchronous mode, smart card
interface (up to eight channels)
 IrDA interface (one channel, in cooperation with SCI5)
 I²C bus interface: Transfer at up to 400 kbps, capable of SMBus
operation (one channel)
 RSPI: Up to 16 Mbps (one channel)
 Serial sound interface (SSI) (one channel)
■ Up to 14 extended-function timers
 16-bit MTU: Input capture/output compare, complementary PWM
output, phase counting mode
(six channels)
 8-bit TMR (four channels)
 16-bit CMT (four channels)
■ LCD controller/driver
 Segment signal output × common signal output:
40 × 4, 36 × 8
 On-chip voltage boost circuit, contrast adjustment, and 5-V panel
supported
 Blinking function
■ 12-bit A/D converter
 Up to 17 channels
 1.0 μs minimum conversion speed
 Double trigger (data duplication) function for motor control
■ 12-bit D/A converter
 Two channels
■ Comparator B
 Two channels
■ Capacitive touch sensing unit (CTSU)
 Detection pins: 12 channels (for 100 pins only)
 High-sensitive electrostatic capacitance detection using
self-capacitance and mutual capacitance methods
 On-chip noise canceller that enables high tolerance to disturbance
noise
 Also supports a mutual capacitance method that allows touch
channels to be increased with low pin counts
■ Temperature sensor
■ General I/O ports
 5-V tolerant, open drain, input pull-up
■ Multi-function pin controller (MPC)
 Multiple I/O pins can be selected for peripheral functions.
■ Unique ID
 32-byte ID code for the MCU
■ Operating temperature range
 40 to 85C
 40 to 105°C
R01DS0216EJ0110 Rev.1.10
Mar 31, 2016
Page 1 of 131