E202075_HD404889 Datasheet, PDF (66/202 Pages) Renesas Technology Corp – Low-Voltage AS Microcomputers with On-Chip LCD Circuit

HD404889/HD404899/HD404878/HD404868 Series
System clock select register (SSR: $004)
Bit
Read/Write
Initial value on reset
Bit name
3
W
0
SSR3^*
2
W
0
SSR2
1
W
0
SSR1
0
W
0
SSR0
System clock division ratio switch
0 Division-by-4 (fcyc - fOSC/4)
1 Division-by-32 (fcyc - fOSC/32)
System clock division ratio switch
0
fosc=0.4–1.0MHz
1
fosc=1.6–4.5MHz
Subsystem clock division ratio switch
0
fSUB=fx/8
1
fSUB=fx/4
Subsystem clock stop setting
0 Subsystem clock operates in stop mode
1 Subsystem clock stops in stop mode
Note: * If the subsystem clock is not used, this bit must be set to 1 following power-on and reset.
If it is set to 0 (the initial value), malfunctioning may occur in the stop mode.
Figure 24 System Clock Select Register
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