E202075_HD404889 Datasheet, PDF (150/202 Pages) Renesas Technology Corp – Low-Voltage AS Microcomputers with On-Chip LCD Circuit

HD404889/HD404899/HD404878/HD404868 Series
Buzzer Output Circuit
Buzzer Output Circuit Functions: The buzzer output circuit has the following functions.
• Timer overflow toggle output
• System clock divided clock pulse output
The block diagram of the buzzer output circuit is shown in figure 93.
Buzzer Output Circuit Operation
• Timer overflow toggle output operation
The timer overflow toggle output operation setting is made by bits 1 and 2 of the buzzer mode register
(BMR) and bit 2 of port mode register 2 (PMR2). By clearing bit 2 of the buzzer mode register (BMR)
to 0, selecting timer B or timer C overflow by bit 1, and setting bit 2 of port mode register 2 (PMR2) to
1, a toggle waveform is output from the BUZZ pin with overflow as the trigger.
• System clock divided clock pulse output
The system clock divided clock pulse output operation setting is made by bits 0 to 3 of the buzzer mode
register (BMR) and bit 2 of port mode register 2 (PMR2). Bit 2 of the buzzer mode register (BMR) is
set to 1, the system clock division ratio is selected by bits 0 and 1, and bit 2 of port mode register 2
(PMR2) is set to 1. Clock pulses are output by setting bit 3 of the buzzer mode register (BMR) to 1. If
bit 3 of the buzzer mode register (BMR) is cleared to 0, the BUZZ pin goes low.
The clock pulse width is fixed without regard to the timing set by bit 3 of the buzzer mode register
(BMR), and careful coordination with software is necessary with regard to the number of output pulses.
After a clock pulse modification is made, clock pulses should not be output until 4tcyc after the
modifying instruction.
Only a bit manipulation instruction can be used on bit 3 of the buzzer mode register (BMR).
Buzzer Output Circuit Registers
Buzzer output circuit operation setting is performed by the following registers.
Buzzer mode register (BMR: $02E)
Port mode register 2 (PMR2: $00A)
Buzzer mode register (BMR: $02E):
The buzzer mode register (BMR) is a 4-bit write-only register used to set toggle output by timer overflow
and system clock divided clock pulse output as shown in figure 94.
Bit 3 of the buzzer mode register (BMR) can only accessed by a bit manipulation instruction.
The buzzer mode register (BMR) is reset to $0 by an MCU reset.
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