E202075_HD404889 Datasheet, PDF (170/202 Pages) Renesas Technology Corp – Low-Voltage AS Microcomputers with On-Chip LCD Circuit

HD404889/HD404899/HD404878/HD404868 Series
Table 32 Register-Register Instructions
Operation
Mnemonic Operation Code
Function
Words/
Status Cycles
Load A from B
LAB
0 0 0 1 0 01 0 0 0
B→A
1/1
Load B from A
LBA
0 0 1 1 0 01 0 0 0
A→B
1/1
Load A from W
LAW
0 1 0 0 0 00 0 0 0
W→A
2/2*
0 0 0 0 0 00 0 0 0
Load A from Y
LAY
0 0 1 0 1 01 1 1 1
Y→A
1/1
Load A from SPX
LASPX
0 0 0 1 1 01 0 0 0
SPX → A
1/1
Load A from SPY
LASPY
0 0 0 1 0 11 0 0 0
SPY → A
1/1
Load A from MR
LAMR m
1 0 0 1 1 1 m₃ m₂ m₁ m₀
MR (m) → A
1/1
Exchange MR and A
XMRA m
1 0 1 1 1 1 m₃ m₂ m₁ m₀
MR (m) ↔ A
1/1
Note: The assembler automatically provides an operand for the second word of the LAW instruction.
Table 33 RAM Address Instructions
Operation
Mnemonic Operation Code
Function
Words/
Status Cycles
Load W from immediate LWI i
0 0 1 1 1 1 0 0 i₁ i₀ i → W
1/1
Load X from immediate LXI i
1 0 0 0 1 0 i₃ i₂ i₁ i₀
i→X
1/1
Load Y from immediate LYI i
1 0 0 0 0 1 i₃ i₂ i₁ i₀
i→Y
1/1
Load W from A
LWA
0 1 0 0 0 1 0 0 0 0 A→W
2/2*
0 0 0 0 0 00 0 0 0
Load X from A
LXA
0 0 1 1 1 0 1 0 0 0 A→X
1/1
Load Y from A
LYA
0 0 1 1 0 1 1 0 0 0 A→Y
1/1
Increment Y
IY
0 0 0 1 0 1 1 1 0 0 Y+1→Y
NZ
1/1
Decrement Y
DY
0 0 1 1 0 1 1 1 1 1 Y–1→Y
NB
1/1
Add A to Y
AYY
0 0 0 1 0 1 0 1 0 0 Y+A→Y
OVF 1/1
Subtract A from Y
SYY
0 0 1 1 0 1 0 1 0 0 Y–A→Y
NB
1/1
Exchange X and SPX XSPX
0 0 0 0 0 0 0 0 0 1 X ↔ SPX
1/1
Exchange Y and SPY XSPY
0 0 0 0 0 0 0 0 1 0 Y ↔ SPY
1/1
Exchange X and SPX, XSPXY
0 0 0 0 0 0 0 0 1 1 X ↔ SPX,Y ↔ SPY
1/1
Y and SPY
Note: The assembler automatically provides an operand for the second word of the LWA instruction.
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