E202075_HD404889 Datasheet, PDF (131/202 Pages) Renesas Technology Corp – Low-Voltage AS Microcomputers with On-Chip LCD Circuit

HD404889/HD404899/HD404878/HD404868 Series
A/D data register-lower (ADRL: $02A)
Bit
Read/Write
Initial value on reset
Bit name
3
R
1
ADRL3
2
R
1
ADRL2
1
R
1
ADRL1
0
R
1
ADRL0
Figure 77 A/D Data Register-Lower (ADRL)
A/D data register-upper (ADRU: $02B)
Bit
Read/Write
Initial value on reset
Bit name
3
R
0
ADRU3
2
R
1
ADRU2
1
R
1
ADRU1
0
R
1
ADRU0
Figure 78 A/D Data Register-Upper (ADRU)
Module standby register 2 (MSR2: $00E):
Writing 1 to bit 1 of module standby register 2 stops the supply of the system clock to the A/D module and
cuts the current (I_AD) flowing in the ladder resistor.
Usage notes:
• Use the SEM or SEMD instruction to write to the A/D start flag (ADSF).
• Do not write to the ADSF during A/D conversion.
• Data in the A/D data register is undetermined during A/D conversion.
• As the A/D converter operates on a clock from OSC, it stops in stop mode, watch mode, and subactive
mode. The current flowing in the A/D converter ladder resistor is also cut in these low-power modes to
reduce power consumption.
• When an analog input pin is selected by the A/D mode register, the pull-up MOS for that pin is
disabled.
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