E202075_HD404889 Datasheet, PDF (121/202 Pages) Renesas Technology Corp – Low-Voltage AS Microcomputers with On-Chip LCD Circuit

HD404889/HD404899/HD404878/HD404868 Series
Transfer end
(IFS←"1")
Disable interrupts
IFS←"0"
SMR1 write
State
Serial clock
wait state
SCK pin
(input)
1
SMR1
write
Yes
IFS=1?
No
Normal termination
Serial clock
error processing
(1) Serial clock error detection flowchart
Transfer state
Serial clock
wait state
Transfer state
(Noise)
2
3
4
5
6
7
Because the serial
interface returns to
the transfer state, a
8
write to SMR1
resets IFS.
IFS
Flag set by octal
counter reaching
000
(2) Serial clock error detection sequence
Flag reset by transfer
end processing
Figure 65 Example of Serial Clock Error Detection
119