MC92314 Datasheet, PDF (84/100 Pages) Motorola, Inc – DVB-T Single Chip Demodulator Application Note

Freescale Semiconductor, Inc.
Usage and Performance of Motorola’s Single-chip DVB-T Device
Especially in reception environments impaired by echoes or CCI transmissions it is essential to
decrease the value if lock has been achieved to ensure stable behaviour of the AGC loop.
5.4.1.2 Co-Channel Protection vs. Noise
As already mentioned in paragraph 4.2.2.1.11 the generation of the soft-decision information for
the Viterbi decoder is optimised for best noise performance. Depending from the transmission
environment it may be desirable to achieve better CCI performance at a very small penalty on
the noise performance. This can be achieved by changing the CSE register using the values
given in the table below:
Table 5-3. CSE Register Values optimised for CCI Performance
Register
Address
Register Name
Initial Value New Value
$17 CSE 0 (CSE[7:0])
$C5
$74
n _{$18 CSE 1 (CSE[15:8])}
$D2
$77
tio ^{$19 CSE 2 (CSE[23:16])}
$DF
$7A
a $1A CSE 3 (CSE[31:24])
$10
$01
rm _{5.4.2 Possible Changes in the FEC Block}
fo _{5.4.2.1 Fixing the Coderate for the Viterbi Decoder}
In ^{It is part of the usual lock procedure for the FEC to figure out the FEC parameters of the DVB-T}
signal received. The time necessary for this may be reduced by using the readily available FEC
y _{information transmitted via the TPS channel.}
ar _{To shorten the time necessary for the Viterbi decoder to synchronise on the datastream simply}
in _{read the coderate from OFDM register 0 and program it into the CONFIG_VIT register as it is}
described in paragraph 4.2.2.2.1. The time to allow the demodulator device to lock onto the TPS
lim ^{and to make the checked parameters readable in OFDM register 0 is dependent from the signal}
e ^{quality and the tuner design, it has to be investigated with the whole frontend in place.}
Pr ^{5.4.2.2 Adjusting the MPEG Frame Synchroniser}
The function of this functional block is described in detail in paragraph 3.2.3.3. It works on the
hexadecimal values of the MPEG-2 sync bytes ($47 and $B8 resp.) that are of course present in
the normal payload. Depending on the characteristics of the MPEG-2 stream transmitted an
adjustment of the AQ_THRESH or the TR_THRES registers may be necessary to prevent the
MPEG frame synchroniser to lock on payload bytes erroneously.
In case the frame synchroniser indicates that it is in lock and remains there the system controller
may check the RERRU signal. If it persists to show values other than 0 this is either an indication
that the received RF signal is so bad that no reliable reception is necessary or that (very rarely)
a false lock occured.
MOTOROLA
5-6
Single Chip DVB-T Demodulator - Rev. 1.3 (11/30/98)
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