MC92314 Datasheet, PDF (52/100 Pages) Motorola, Inc – DVB-T Single Chip Demodulator Application Note

Freescale Semiconductor, Inc.
DVB-T Demodulator Interfaces
S 7-Bit address 0 0
data byte 1
0
data byte 2
0P
start condition
write access
acknowledge from slave
: from master
: from slave
acknowledge from slave
acknowledge from slave
stop condition
Figure 4-3. Write Sequence
tion Write Transfer
New Read Transfer
a _{data byte 1}
0
data byte 2
1 S ^{7-Bit address} 0 0
rm _{read access}
fo acknowledge from slave
In acknowledge from master acknowledge from master
restart condition
data byte 1
ary : from master
: from slave
limin^{Figure 4-4. Combined Sequence}
e _{4.2.1.5 Accessing Registers via I}2_C
Pr ^{Each internal register accessible by the I2C has an internal I2C register address. Before a}
register can be accessed the I²C register address must be transferred by a write sequence. After
the data byte has been transmitted or received from or to the selected I²C register an additionally
byte transfer can be initiated. This byte transfer will access register with the next following I²C
register address. A short example describes typical I²C sequences in a short format:
MOTOROLA
4-4
Single Chip DVB-T Demodulator - Rev. 1.3 (11/30/98)
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