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MC92314 Datasheet, PDF (33/100 Pages) Motorola, Inc – DVB-T Single Chip Demodulator Application Note
Freescale Semiconductor, Inc.
Device Description
Table 3-4 shows the encoding of the rate information into a three bit word. This information is
used for output information when using automatic synchronisation or for control information
when the block is being externally controlled via the I2C interface.
Table 3-4. Rate Encoding
Coding Rate
Data Word
1/2
000
2/3
001
3/4
010
5/6
011
7/8
100
Automatic
111
n Notes:
Automatic rate selection is only used as an input value
tio when internal synchronisation is used. The decoder will
never output 111 as a coding rate.
a All other states of the 3 bit data word are unused.
rm This table is referred to throughout this document when discussing the various rates supported
fo by the decoder.
y In 3.2.3.2.6 Input Data Format
ar The I and Q data input to the decoder can be interpreted as either sign-magnitude or offset binary
in format. The choice of input format is specified by setting the IFS bit in the CONFIG register bank
of the I2C interface. The default after RESET_N is to use offset binary.
limTable 3-5. I And Q Input Format
Pre Interpretation
VC0[2:0]/VC1[2:0]
IFS = 0
IFS = 1
2’s complement
(internal format)
(offset binary) (sign-magnitude)
strong 0
000
011
100
.
001
010
101
.
010
001
110
weak 0
011
000
111
weak 1
100
100
000
.
101
101
001
.
110
110
010
strong 1
111
111
011
3.2.3.2.7 Channel SNR Measurement
The synchroniser generated syndrome sequence (p0) is used to determine the channel SNR
value.
period
The
and
average value of
is accessible via
the
the
number of 1’s
I2C interface.
accumulated
from
p0
is
calculated
over
a
known
Single Chip DVB-T Demodulator - Rev. 1.3 (11/30/98)
For More Information On This Product,
Go to: www.freescale.com
MOTOROLA
3-15