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MC92314 Datasheet, PDF (63/100 Pages) Motorola, Inc – DVB-T Single Chip Demodulator Application Note
Freescale Semiconductor, Inc.
DVB-T Demodulator Interfaces
used to set the analog voltage level at the AGC input of the tuner. The format is identical to the
AGC Feedback register described below (12 bit width, 4 MSBs of register 1 are always 0).
The following table summarises the voltage levels after the LPF in relation to the AGCS bit:
Table 4-6. Voltages after the AGC LPF using the AGC Fix Register
AGC Fix Register Content
AGCS Voltage Level
-2048 (00001000 00000000)
0
Lowest voltage (near 0 V)
+2047 (00000111 11111111)
0
Highest Voltage (near 3 V)
-2048 (00001000 00000000)
1
Highest Voltage (near 3 V)
+2047 (00000111 11111111)
1
Lowest voltage (near 0 V)
n 4.2.2.1.14 AFC Feedback [1:0] ($30:$2F, R)
tio These two registers represent the current offset of the internal AFC block inside the available
a range (register 0 at address $2F corresponds to the LS byte, register 1 at address $30 to the MS
byte). Values within the available range excluding the edges represent normal operation.
rm 4.2.2.1.15 AGC Feedback [1:0] Register ($34:$33, R)
fo Similar to the AFC Feedback register these two registers represent the current position of the
In AGC control inside the available range (register 0 at address $33 corresponds to the LS byte,
register 1 at address $34 to the MS byte). The number format is 2’s complement and the number
ry contains 12 valid bits (the 4 MSBs of register 1 are not used, they are always 0).
a The AGC voltage levels corresponding to the numbers depend from the value of the AGC Slope
in bit AGCS:
lim Table 4-7. Voltages according to the AGC Feedback Registers
e AGC Feedback Register Content
Pr -2048 (00001000 00000000)
AGCS
0
Voltage Level
Lowest voltage (near 0 V)
+2047 (00000111 11111111)
0
Highest Voltage (near 3 V)
-2048 (00001000 00000000)
1
Highest Voltage (near 3 V)
+2047 (00000111 11111111)
1
Lowest voltage (near 0 V)
Note that for correct operation bit AGCS must reflect the behaviour of the tuner’s AGC circuitry.
Given that this setting is correct and the OFDM block is locked onto the signal the most negative
value corresponds to the minimum gain of the tuner and the most positive value corresponds
to the maximum gain.
4.2.2.1.16 VCXO Fix [1:0] Register ($37:$36, W)
This 2-byte register can be used to set the voltage at the σδ-output for the VCXO in the tuner,
mainly intended for test purposes, not for normal operation. To use them the FTSE bit must be
set to 0. Afterwards the VCXO Fix register can be used to set the analog voltage level at the
VCXO input of the tuner. Again, the 4 MSBs of register 1 are always 0.
Single Chip DVB-T Demodulator - Rev. 1.3 (11/30/98)
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MOTOROLA
4-15