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MC92314 Datasheet, PDF (34/100 Pages) Motorola, Inc – DVB-T Single Chip Demodulator Application Note
Device Description
Freescale Semiconductor, Inc.
The window length used is specified by the AVRG_PERIOD register and is interpreted as
AVRG_PERIOD[3:0] * 215, the default period of 8 * 215 is used if the DAP bit in the CONFIG
register bank is set to 1. The number of 1’s in the syndrome stream (divided by 16) which are
accumulated over the specified period may be read from the registers QVALMSB[7:0] and
QVALLSB[7:0].
The estimated value of p0 is:
p0 = 1–P-----EQ----R-V---I-A-O---L--D---×--×---2--2-4--1---5
The value of p0 can be directly related to the signal quality for the various code rates via the
curves shown in Figure 3-10. This signal quality value corresponds to the channel SNR of QPSK
transmission over an AWGN channel. The curves are generated specifically for the syndrome
n polynomials actually used in the decoder. To derive a channel SNR value simply look up the
Preliminary Informatio value on the x-axis of a given p0 value for a given code rate.
MOTOROLA
3-16
Single Chip DVB-T Demodulator - Rev. 1.3 (11/30/98)
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