MC92314 Datasheet, PDF (28/100 Pages) Motorola, Inc – DVB-T Single Chip Demodulator Application Note

Device Description
Freescale Semiconductor, Inc.
Where “syncstates” is given by:
Table 3-2. Number of Syncstates in Code Rates
Rate
1/2
2/3
3/4
5/6
7/8
Synchstates
2
6
4
6
8
NOTE
For automatic rate selection the synchroniser investigates the
possible synchronisation states one after the other and RARL is
n _{calculated as follows:}
atio _∑ ^

7--
8


RARL = 
Synchstates × SARL

m ^rate
=
1--
2


Infor _{• Long Average Run Length (LARL): This is the mean time until the algorithm incorrectly}
y indicates a change of the synchronisation state that did not actually occur.
r _{This grows exponentially with the threshold value THRES.}
a _NOTE
in _{While the SARL and RARL can be determined analytically the}
lim ^{evaluation of the LARL is nontrivial and is best determined via}
e ^simulation.
Pr ^{Figure 6-2. shows the simulated LARL for all code rates, the channel error rate is set so the SNR}
is 1dB below the error rate required for QEF operation at the output of Viterbi decoder.
MOTOROLA
3-10
Single Chip DVB-T Demodulator - Rev. 1.3 (11/30/98)
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