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MC92314 Datasheet, PDF (27/100 Pages) Motorola, Inc – DVB-T Single Chip Demodulator Application Note
Freescale Semiconductor, Inc.
Device Description
The defaults have been chosen such that the synchroniser will operate correctly (but with a
performance degradation) roughly 2 dB below the output error rate, which is required for quasi
error free operation (BER of the decoded stream approximately =2 x 10-4).
Table 3-1. Default Settings For DEC Parameter
Rate
Dec
Lower SNR
Boundary
(dB)
Quasi
Error
Free SNR
(dB)
Design
Point SNR
(dB)
Design
Point
Channel
BER
1/2
29
1.2
3.0
2.15
0.100
2/3
26
2.0
3.5
2.49
0.062
3/4
25
2.4
n 5/6
24
2.9
tio 7/8
23
3.5
4.0
3.00
0.042
4.5
3.51
0.026
5.2
4.10
0.017
a 3.2.3.1.5 Synchroniser Performance
rm The performance of the synchroniser can be characterized by three figures:
fo • Short Average Run Length (SARL):
In This is the mean time required to detect that the currently investigated synchronisation state
is not the correct synchronisation state.
ry The SARL is calculated as:
ina SARL = -I-2-N--X--C--T----–H----D-R----EE----SC---
elim NOTES
Pr SARL performance is not affected by the channel SNR since the
syndrome sequence is composed of equiprobable 1’s and 0’s for an
out of synch condition and low channel SNR would also result in
equiprobable 1’s and 0’s.
• Reacquisition Average Run Length (RARL):
This is the mean time between a erroneous detection of a change of the synchronisation
state and successful acquisition of the new synchronisation state (reacquisition).
The RARL is calculated as:
RARL = (---s---y---n---c--S-s--A-t--a-R--t--eL---s----–----1----)
Single Chip DVB-T Demodulator - Rev. 1.3 (11/30/98)
For More Information On This Product,
Go to: www.freescale.com
MOTOROLA
3-9