MC92314 Datasheet, PDF (43/100 Pages) Motorola, Inc – DVB-T Single Chip Demodulator Application Note

Freescale Semiconductor, Inc.
Device Description
• N = 204 Codeword Length
• T = 8 Number of Error Corrections
3.2.3.5.2 Reed-Solomon Functional Description
The architecture of the Reed-Solomon decoder is shown in Figure 3-17. The Re-Encoder
consists of a Linear Feedback Shift Register (LFSR) of length 16 (bytes) with the feedback
connections as specified by the Code Generator Polynomial Coefficients. For each Codeword
arriving byte by byte, the Re-Encoder performs a division of this Codeword by the Code
Generator Polynomial and stores the remainder. After processing the first 188 information bytes,
the Encoder appends the resulting 16 remainder bytes to the byte stream. If, after processing
188 bytes, the Re-Encoder register contents are identical to the 16 last bytes of the Codeword,
the Codeword is assumed to have been received without error. Otherwise, the Syndrome (the
EXOR of the 16 parity check bytes) and the register contents are stored in the Syndrome RAM.
tion ^{From the Syndrome, the Reed-Solomon Core iteratively determines the Error Location}
Polynomial (ELP) and the Error Evaluation Polynomial (EEP). The roots of the ELP specify the
a _{error locations inside the Codeword. These roots are determined in the Chien Search Unit, which}
m _{checks for roots by evaluating the ELP for all 255 possible field elements. Simultaneously, the}
r _{EEP polynomial is evaluated. For each root found, the corresponding EEP value is used to}
fo correct the byte error at the specific bit locations. The input data is stored in the Codeword RAM
In ^{(Reed-Solomon FIFO) during the operation of the Core and the Chien Search Unit in order to}
take account of the latencies therein. After the roots and error values are determined by the
y _{Chien Search Unit, the data is read from the FIFO, and the necessary byte corrections are}
r _{performed in the Error Correction Unit.}
ina ^{If more than 8 byte errors occur in a single frame, this is recognized by the decoder and the input}
data is output unchanged. In this case, the “transport_error_indicator” bit in the MPEG-2
Prelim Transport Header is set and the RERRU output shall be asserted.
Reed-Solomon
Re-Encoder LFSR
Syndrome
Word RAM
Error Loca-
tion
and Error
Evaluation
Error Loca-
tion
and Error
Correction
Reed-Solomon
Codeword FIFO
Figure 3-17. Reed-Solomon Block Diagram
Single Chip DVB-T Demodulator - Rev. 1.3 (11/30/98)
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