N25Q512A13GF840E Datasheet, PDF (66/91 Pages) Micron Technology – Micron Serial NOR Flash Memory 3V, Multiple I/O, 4KB Sector Erase N25Q512A

512Mb, Multiple I/O Serial Flash Memory
ERASE Operations
Table 29: Operations Allowed/Disallowed During Device States
Note 1 applies to entire table
Standby
Operation
State
READ
Yes
PROGRAM
Yes
ERASE
Yes
WRITE
Yes
WRITE
Yes
READ
Yes
SUSPEND
No
Program or
Erase State
No
No
No
No
No
Yes
Yes
Subsector Erase Suspend or
Program Suspend State
Yes
No
No
No
Yes
Yes
No
Erase Suspend
State
Yes
Yes/No
No
No
Yes
Yes
No
Notes
2
3
4
5
6
7
8
Notes:
1. The device can be in only one state at a time. Depending on the state of the device,
some operations are allowed (Yes) and others are not (No). For example, when the de-
vice is in the standby state, all operations except SUSPEND are allowed in any sector. For
all device states except the erase suspend state, if an operation is allowed or disallowed
in one sector, it is allowed or disallowed in all other sectors. In the erase suspend state, a
PROGRAM operation is allowed in any sector except the one in which an ERASE opera-
tion has been suspended.
2. All READ operations except READ STATUS REGISTER and READ FLAG REGISTER. When is-
sued to a sector or subsector that is simultaneously in an erase suspend state, the READ
operation is accepted, but the data output is not guaranteed until the erase has comple-
ted.
3. All PROGRAM operations except PROGRAM OTP. In the erase suspend state, a PROGRAM
operation is allowed in any sector (Yes) except the sector (No) in which an ERASE opera-
tion has been suspended.
4. Applies to the SECTOR ERASE or SUBSECTOR ERASE operation.
5. Applies to the following operations: WRITE STATUS REGISTER, WRITE NONVOLATILE
CONFIGURATION REGISTER, PROGRAM OTP, and DIE ERASE.
6. Applies to the WRITE VOLATILE CONFIGURATION REGISTER, WRITE ENHANCED VOLA-
TILE CONFIGURATION REGISTER, WRITE ENABLE, WRITE DISABLE, CLEAR FLAG STATUS
REGISTER, WRITE EXTENDED ADDRESS REGISTER, ENTER 4-BYTE EXTENDED ADDRESS
REGISTER, EXIT 4-BYTE EXTENDED ADDRESS REGISTER, or WRITE LOCK REGISTER opera-
tion.
7. Applies to the READ STATUS REGISTER or READ FLAG STATUS REGISTER operation.
8. Applies to the PROGRAM SUSPEND or ERASE SUSPEND operation.
PROGRAM/ERASE RESUME Command
To initiate the PROGRAM/ERASE RESUME command, S# is driven LOW. The command
code is input on DQ0. The operation is terminated by driving S# HIGH.
When this command is executed, the status register write in progress bit is set to 1, and
the flag status register program erase controller bit is set to 0. This command is ignored
if the device is not in a suspended state.
When the operation is in progress, the program or erase controller bit of the flag status
register is set to 0. The flag status register must be polled for the operation status. When
the operation completes, that bit is cleared to 1. Note that the flag status register must
be polled even if operation times out.
PDF: 09005aef84752721
n25q_512mb_1ce_3V_65nm.pdf - Rev. O 05/13 EN
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