N25Q512A13GF840E Datasheet, PDF (25/91 Pages) Micron Technology – Micron Serial NOR Flash Memory 3V, Multiple I/O, 4KB Sector Erase N25Q512A

512Mb, Multiple I/O Serial Flash Memory
Nonvolatile and Volatile Registers
Table 16: Enhanced Volatile Configuration Register Bit Definitions (Continued)
Note 1 applies to entire table
Bit Name
Settings
2:0 Output driver strength 000 = Reserved
001 = 90 Ohms
010 = 60 Ohms
011 = 45 Ohms
100 = Reserved
101 = 20 Ohms
110 = 15 Ohms
111 = 30 (Default)
Description
Optimizes impedance at V_CC/2 output voltage.
Notes
Notes:
1. Settings determine the device memory configuration upon a change of those settings by
the WRITE ENHANCED VOLATILE CONFIGURATION REGISTER command. The register is
read from or written to in all protocols by READ ENHANCED VOLATILE CONFIGURATION
REGISTER or WRITE ENHANCED VOLATILE CONFIGURATION REGISTER commands, respec-
tively.
2. If bits 6 and 7 are both set to 0, the device operates in quad I/O. When either bit 6 or 7 is
reset to 0, the device operates in dual I/O or quad I/O respectively following the next
WRITE ENHANCED VOLATILE CONFIGURATION command.
Flag Status Register
Table 17: Flag Status Register Bit Definitions
Note 1 applies to entire table
Bit Name
Settings
7 Program or
erase
controller
0 = Busy
1 = Ready
6 Erase suspend 0 = Not in effect
1 = In effect
5 Erase
0 = Clear
1 = Failure or protection error
4 Program
0 = Clear
1 = Failure or protection error
3 V_PP
0 = Enabled
1 = Disabled (Default)
2 Program sus- 0 = Not in effect
pend
1 = In effect
1 Protection
0 = Clear
1 = Failure or protection error
Description
Notes
Status bit: Indicates whether one of the following
2, 5
command cycles is in progress: WRITE STATUS
REGISTER, WRITE NONVOLATILE CONFIGURATION
REGISTER, PROGRAM, or ERASE.
Status bit: Indicates whether an ERASE operation has
2
been or is going to be suspended.
Error bit: Indicates whether an ERASE operation has
3, 4
succeeded or failed.
Error bit: Indicates whether a PROGRAM operation has 3, 4
succeeded or failed; also an attempt to program a 0 to
a 1 when V_PP = V_PPH and the data pattern is a multiple
of 64 bits.
Error bit: Indicates an invalid voltage on V_PP during a
3, 4
PROGRAM or ERASE operation.
Status bit: Indicates whether a PROGRAM operation
2
has been or is going to be suspended.
Error bit: Indicates whether an ERASE or PROGRAM
3, 4
operation has attempted to modify the protected array
sector, or whether a PROGRAM operation has attemp-
ted to access the locked OTP space.
PDF: 09005aef84752721
n25q_512mb_1ce_3V_65nm.pdf - Rev. O 05/13 EN
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