MT40A512M16HA-083EIT Datasheet, PDF (209/373 Pages) Micron Technology – Programmable data strobe preambles

8Gb: x4, x8, x16 DDR4 SDRAM
READ Operation
Figure 147: READ (BC4) to WRITE (BL8) OTF with 1^tCK Preamble in Same or Different Bank Group
T0
T1
T5
T6
T7
T8
T9
T10
T11
T12
T13
T14
T15
T16
T17
T18
T19
T20
CK_c
CK_t
Command READ
DES
DES
WRITE
DES
DES
DES
DES
DES
DES
DES
DES
DES
DES
DES
DES
DES
DES
t_WR
READ to WRITE command delay
= RL +BL/2 - WL + 2 ^tCK
4 Clocks
t_WTR
Bank Group
BGa
Address
BGa or
BGb
Address
Bank
Col n
DQS_t,
DQS_c
DQ
Bank
Col b
RL = 11
t_RPRE
t_RPST
t_WPRE
t_WPST
DO DO DO DO
n n+1 n+2 n+3
WL = 9
DI DI DI DI DI DI DI DI
b b+1 b+2 b+3 n+4 n+5 n+6 n+7
Time Break
Transitioning Data
Don’t Care
Notes:
1. BL = 8, RL = 11 (CL = 11, AL = 0), READ preamble = 1^tCK, WL = 9 (CWL = 9, AL = 0), WRITE
preamble = 1^tCK.
2. DO n = data-out from column n; DI b = data-in from column b.
3. DES commands are shown for ease of illustration; other commands may be valid at
these times.
4. BC4 setting activated by MR0[1:0] = 01 and A12 = 0 during WRITE commands at T0.
BL8 setting activated by MR0[1:0] = 01 and A12 = 1 during READ commands at T6.
5. CA parity = Disable, CS to CA latency = Disable, Read DBI = Disable, Write DBI = Disable,
Write CRC = Disable.
Figure 148: READ (BC4) to WRITE (BL8) OTF with 2^tCK Preamble in Same or Different Bank Group
T0
T1
T5
T6
T7
T8
T9
T10
T11
T12
T13
T14
T15
T16
T17
T18
T19
T20
CK_c
CK_t
Command READ
DES
DES
WRITE
DES
DES
DES
DES
DES
DES
DES
DES
DES
DES
DES
DES
DES
DES
t_WR
READ to WRITE command delay
= RL +BL/2 - WL + 3 ^tCK
4 Clocks
t_WTR
Bank Group
BGa
Address
BGa or
BGb
Address
Bank
Col n
DQS_t,
DQS_c
DQ
Bank
Col b
RL = 11
t_RPRE
t_RPST
DO DO DO DO
n n+1 n+2 n+3
WL = 10
t_WPRE
t_WPST
DI DI DI DI DI DI DI DI
b b+1 b+2 b+3 n+4 n+5 n+6 n+7
Time Break
Transitioning Data
Don’t Care
Notes:
1. BL = 8, RL = 11 (CL = 11, AL = 0), READ preamble = 2^tCK, WL = 10 (CWL = 9 + 1 [see Note
5], AL = 0), WRITE preamble = 2^tCK.
2. DO n = data-out from column n; DI b = data-in from column b.
3. DES commands are shown for ease of illustration; other commands may be valid at
these times.
4. BC4 setting activated by MR0[1:0] = 01 and A12 = 0 during WRITE commands at T0.
BL8 setting activated by MR0[1:0] = 01 and A12 = 1 during READ commands at T6.
09005aef861d1d4a
8gb_ddr4_dram.pdf - Rev. G 1/17 EN
209
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