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MT40A512M16HA-083EIT Datasheet, PDF (120/373 Pages) Micron Technology – Programmable data strobe preambles
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VREFDQ Range and Levels
8Gb: x4, x8, x16 DDR4 SDRAM
VREFDQ Calibration
Table 37: VREFDQ Range and Levels
MR6[5:0]
00 0000
00 0001
00 0010
00 0011
00 0100
00 0101
00 0110
00 0111
00 1000
00 1001
00 1010
00 1011
00 1100
00 1101
00 1110
00 1111
01 0000
01 0001
01 0010
01 0011
01 0100
01 0101
01 0110
01 0111
01 1000
01 1001
Range 1 MR6[6] 0
60.00%
60.65%
61.30%
61.95%
62.60%
63.25%
63.90%
64.55%
65.20%
65.85%
66.50%
67.15%
67.80%
68.45%
69.10%
69.75%
70.40%
71.05%
71.70%
72.35%
73.00%
73.65%
74.30%
74.95%
75.60%
76.25%
Range 2 MR6[6] 1
45.00%
45.65%
46.30%
46.95%
47.60%
48.25%
48.90%
49.55%
50.20%
50.85%
51.50%
52.15%
52.80%
53.45%
54.10%
54.75%
55.40%
56.05%
56.70%
57.35%
58.00%
58.65%
59.30%
59.95%
60.60%
61.25%
MR6[5:0] Range 1 MR6[6] 0
01 1010
76.90%
01 1011
77.55%
01 1100
78.20%
01 1101
78.85%
01 1110
79.50%
01 1111
80.15%
10 0000
80.80%
10 0001
81.45%
10 0010
82.10%
10 0011
82.75%
10 0100
83.40%
10 0101
84.05%
10 0110
84.70%
10 0111
85.35%
10 1000
86.00%
10 1001
86.65%
10 1010
87.30%
10 1011
87.95%
10 1100
88.60%
10 1101
89.25%
10 1110
89.90%
10 1111
90.55%
11 0000
91.20%
11 0001
91.85%
11 0010
92.50%
11 0011 to 11 1111 = Reserved
Range 2 MR6[6] 1
61.90%
62.55%
63.20%
63.85%
64.50%
65.15%
65.80%
66.45%
67.10%
67.75%
68.40%
69.05%
69.70%
70.35%
71.00%
71.65%
72.30%
72.95%
73.60%
74.25%
74.90%
75.55%
76.20%
76.85%
77.50%
VREFDQ Step Size
The VREF step size is defined as the step size between adjacent steps. VREF step size rang-
es from 0.5% VDDQ to 0.8% VDDQ. However, for a given design, the device has one value
for VREF step size that falls within the range.
The VREF set tolerance is the variation in the VREF voltage from the ideal setting. This ac-
counts for accumulated error over multiple steps. There are two ranges for VREF set tol-
erance uncertainty. The range of VREF set tolerance uncertainty is a function of number
of steps n.
The VREF set tolerance is measured with respect to the ideal line, which is based on the
MIN and MAX VREF value endpoints for a specified range. The internal V REFDQ voltage
09005aef861d1d4a
8gb_ddr4_dram.pdf - Rev. G 1/17 EN
120
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